Personal communications device with GPS receiver and common...

Telecommunications – Receiver or analog modulated signal frequency converter – Local control of receiver operation

Reexamination Certificate

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Details

C455S259000, C455S013200

Reexamination Certificate

active

06650879

ABSTRACT:

FIELD OF THE INVENTION
This invention is generally related to a personal communications device having global positioning system receiver provisions which are clocked via a clock signal derived from a clock source shared with CDMA based radio. More particularly, the invention provides for a fractional N-synthesizer for providing a feedback signal for controlling an oscillator signal output frequency.
BACKGROUND OF THE INVENTION
Personal communications devices incorporating global positioning (GPS) capabilities are becoming popular. In these devices, the circuitry and components necessary to provide the global positioning capabilities must share the same enclosure and circuit board real estate as the circuitry and components dedicated to providing, for example, mobile (cellular) telephone capabilities. Further, circuitry and components for both, GPS capabilities as well as mobile telephone capabilities are powered by the same power source, typically, via an on-board battery. While battery technology is improving, it is typical that the more power consumed by a device the larger the physical size of the battery necessary to provide a given operating time.
The demand for smaller, more compact personal communication devices is increasing. Concurrent with this increasing demand for compactness is the demand for devices that provide for increased functionality and capabilities. As functionality and capabilities increase, typically, so does the need for power and printed circuit real estate within the personal communications device.
In personal communications devices such as that shown in the block diagram of
FIG. 1
, wherein there is provided a personal communications device that incorporates a global positioning systems (GPS) receiver
100
and a code division multiple access (CDMA) based telecommunications device
200
, it is common for separate clock sources (oscillators) to be associated with the GPS receiver
100
and the CDMA device
200
. More particularly, GPS receiver
100
includes an associated oscillator
101
while CDMA device
200
includes an associated oscillator
201
. Each oscillator,
101
and
201
provides a clock signal to the respective circuitry to which it is associated.
FIG. 2
shows a GPS receiver
100
, which includes an oscillator
101
. Oscillator
101
provides a signal of a particular frequency to phase comparator
146
. Phase comparator
146
also receives input from frequency divider
136
and outputs a signal to loop filter
145
. Loop filter
145
provides a signal to voltage controlled oscillator (VCO)
115
which generates an output signal whose frequency is contingent upon the signal input from loop filter
145
. The signal from VCO
115
is provided to mixer
110
where it is combined with a radio frequency (RE) signal from low noise amplifier (LNA)
105
to produce a first intermediate frequency (EF) signal S
1
. The first IF signal S
1
is provided to variable amplifier
112
and then on to mixer
120
and mixer
121
. In mixer
120
, the signal S
1
is combined with a signal S
2
from frequency divider
130
to produce an in-phase second IF frequency output signal S
3
. In mixer
121
, the signal S
1
is combined with a signal S
4
from frequency divider
130
to produce a quadrature phase second IF frequency output signal S
5
. Signal S
3
is provided to comparator and A to D processor
125
to produce a digitized signal
1
for output to GPS baseband section
150
. Signal S
5
is provided to comparator and A to D processor
126
to produce a digitized signal Q for output to GPS baseband section
150
. Frequency divider
130
also provides its output signal S
4
to frequency divider
135
and frequency divider
136
. The output from VCO
115
is also provided to the frequency divider
130
. Frequency divider
130
outputs a signal S
4
that is mixed by mixer
121
with a signal S
1
to produce a signal S
5
.
As two separate oscillators are provided within the same personal communications device
10
, printed circuit board and/or integrated circuit real estate is devoted to accommodating each oscillator. Another disadvantage is that power consumption of the two oscillators is greater than for one oscillator. Thus it is desirable to have a personal communications device that overcomes the stated disadvantages.
SUMMARY OF THE INVENTION
This invention is directed to a personal telecommunications device having both global positioning systems (GPS) and telecommunications provisions that share a common clock source. GPS provisions include a feedback loop for controlling an oscillator generating a GPS system signal based upon the common clock signal. The feedback loop includes a frequency synthesizer for generating a feedback control signal, a phase comparator for generating a control signal in accordance with the feedback signal and the common clock signal, and a loop filter for processing and outputting the control signal to the oscillator to control the frequency of GPS system signals.
The invention provides a system for providing a clock signal to a global positioning system (GPS) receiver based upon a common clock source. In the architecture, the system may be implemented with a personal communications system that includes a telecommunications unit, a global positioning systems (GPS) receiver, and a common clock source for providing a clock signal to the global positioning receiver and the telecommunications unit. The GPS receiver includes a frequency synthesizer for providing a feedback signal for controlling an oscillator to provide a GPS system clock signal.
The invention can also be viewed as providing a method for a system clock signal to a GPS receiver. In this regard, the method can be broadly summarized by the following steps: receiving a clock signal from a clock source; generating a control voltage for controlling the frequency of an oscillator signal generated by an oscillator based upon a feedback signal from a frequency synthesizer; and generating a system clock signal of a particular frequency in response to the control voltage.


REFERENCES:
patent: 5119504 (1992-06-01), Durboraw, III
patent: 5523761 (1996-06-01), Gildea
patent: 5535432 (1996-07-01), Dent
patent: 5734966 (1998-03-01), Farrer et al.
patent: 5841396 (1998-11-01), Krasner
patent: 6002363 (1999-12-01), Krasner
patent: 6041222 (2000-03-01), Horton et al.
patent: 6088348 (2000-07-01), Bell et al.
patent: 6097974 (2000-08-01), Camp et al.
patent: 6300899 (2001-10-01), King
patent: 6314111 (2001-11-01), Nandikonda et al.
patent: WO 99/57929 (1999-11-01), None

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