Peripherals interrupt control unit

Details Peripherals interrupt control unit Peripherals interrupt control unit

1974-06-07

1977-05-31

Shaw, Gareth D.

Communications: electrical

Digital comparator systems

G06F 304, G06F 918

Patent

active

040272907

ABSTRACT:
A multiple control unit for selectively connecting a plurality of peripheral units to a central processor comprising a register for storing the interruptions coming from the peripherals; a disabling circuit for disabling the cell storing the interruption executed by the central processor in response to an end-of processing signal generated from the CPU.

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