Performing SIMD shift and arithmetic operation in non-SIMD archi

Details Performing SIMD shift and arithmetic operation in non-SIMD archi Performing SIMD shift and arithmetic operation in non-SIMD archi

1996-12-20

1999-12-21

Kim, Kenneth S.

Electrical computers and digital processing systems: processing

Processing architecture

Array processor

708524, 712221, 712223, 712224, G06F 9302

Patent

active

060063165

ABSTRACT:
A microprocessor circuit is disclosed for instructions on an arithmetic/shift function performing standard operations (e.g., ALU instructions or Shift instructions) on instructions in a first cycle of operation, and a correction circuit responsive to the arithmetic/shift function for modifying the standard results provided by the arithmetic/shift function to results required by a SIMD instruction being executed. The arithmetic/shift function is an instruction provided by either an Arithmetic Logic Unit (ALU) or by a shift instruction. The correction circuit passes data, unchanged for logical instructions but provides condition codes according to the SIMD instruction.

REFERENCES:
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patent: 5276634 (1994-01-01), Suzuki et al.
patent: 5408670 (1995-04-01), Davies
patent: 5418915 (1995-05-01), Matuda et al.
patent: 5627966 (1997-05-01), Hanko
patent: 5666298 (1997-09-01), Peleg et al.
patent: 5689592 (1997-11-01), Ericsson et al.

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