Performing conditional operations in a programmable logic...

Electrical computers: arithmetic processing and calculating – Electrical digital calculating computer – Particular function performed

Reexamination Certificate

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

Reexamination Certificate

active

07043511

ABSTRACT:
A vector-domain engine configured to perform conditional operations on an operand vector in a programmable logic device is disclosed. The vector-domain engine may receive an instruction from and transmit an output vector to a programmable-logic-device domain. The output vector may be a first or second output vector depending on whether a comparison unit in the engine determines that a bit-field of the operand vector matches a designated pattern. The first output vector may be the operand vector modified by a function unit, and the second output vector may be the operand vector unmodified. A shifter may be employed to shift the bit-field to a desired position in the operand vector. The operand vector may comprise a pattern-defining portion and a data portion. The engine may also be configured to test a predetermined number of sequential operand vectors for the presence of the pattern.

REFERENCES:
patent: 4642487 (1987-02-01), Carter
patent: 4706216 (1987-11-01), Carter
patent: 4758985 (1988-07-01), Carter
patent: 4815021 (1989-03-01), Steiner et al.
patent: 5754459 (1998-05-01), Telikepalli
patent: 5964825 (1999-10-01), Seshan et al.
patent: 6362650 (2002-03-01), New et al.
patent: 6708191 (2004-03-01), Chapman et al.
U.A. Appl. No. 10/187,236, filed Jun. 28, 2002, Conrad Dante.
“CPU and Instruction Set”, TMS320F/C24x DSP Controllers Reference Guide, Texas Instruments, pp. 4-1 to 4-20 (1999).
“Stratix: Programmable Logic Device Family,” Altera Corporation, Aug. 2002, Ver. 2.1 Data Sheet.
“Silicon,” Xilinx Products website, http://www.xilinx.c m/xlnx/xil—pr dc t—pr duct.jsp?title=silic n, printed Sep. 16, 2002, 3 pages.
Chameleon Systems—YOUR Communucation Platform; from website www.chameleonsystems.com, 5 pages.
“Tool suite supports reconfigurable processor” article by Richard Goering; published inEE Timeson Aug. 14, 2001, 6 pages.
Xilinx Home; Virtex-II Pro Platform FPGAs; The Platform for Programmable Systems; from website www.xilinx.com, 3 pages.
Xilinx Home; PowerPC Embedded Processor Solution; from website www.xilinx.com, 2 pages.
Xilinx Home; The First Platform FPGA Solution; from website www.xilinx.com, 2 pages.
Xilinx Home; Virtex-II Platform FPGA Features; from website www.xilinx.com, 3 pages.
QuickLogic Home; QuickRAM, Dual-Port Embedded RAM for Extremely High Performance Functions; from website www.quicklogic.com, 3 pages.
QuickLogic Home; QuickDSP, Embedded DSP Building Blocks for High-Performance, Complex DSP Designs; from website www.quicklogic.com, 2 pages.
QuickLogic Home; Eclipse, High Performance FPGAs with Enhanced Logic Supercell; from website www.quicklogic.com, 3 pages.
“Re-configurable High Speed Arithmetic Functions in a Non-Volatile FPGA”, written by Rufino T. Olay III, Customer Engineer at QuickLogic, 6 pages.
High Performance Multipliers in QuickLogic FPGAs, written by John Birkner, Jim Jian and Kevin Smith of QuickLogic, 9 pages.

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Performing conditional operations in a programmable logic... does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Performing conditional operations in a programmable logic..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Performing conditional operations in a programmable logic... will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-3647540

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.