Performance monitoring of thread switch events in a multithreade

Details Performance monitoring of thread switch events in a multithreade Performance monitoring of thread switch events in a multithreade

1997-10-23

2000-04-18

Banankhah, Majid A.

Electrical computers and digital processing systems: multicomput

Computer-to-computer data routing

Least weight routing

G06F 900

Patent

active

060527080

ABSTRACT:
A multithreaded processor and a method for performance monitoring within a multithreaded processor are described. According to the present invention, execution circuitry within the multithreaded processor executes instructions in an active thread among first and second concurrent threads, while buffering circuitry buffers instructions and/or data of an inactive one of the first and second concurrent threads. Thread switch logic in the multithreaded processor switches threads by activating the inactive thread and inactivating the active thread. The operation of the multithreaded processor is monitored by a performance monitor, which records occurrences of an event generated by switching threads.

REFERENCES:
patent: 5717926 (1998-02-01), Browning et al.
patent: 5835705 (1998-11-01), Larsen et al.
patent: 5907702 (1999-05-01), Flynn et al.
patent: 5933627 (1999-08-01), Parady
U.S. application Ser. No. 08/957,002, "Thread Switch Control in a Multithreaded Processor Systems", filed Oct. 23, 1997.
U.S. application Ser. No. 08/958,716, "Method and Apparatus for Selecting Thread Switch Events in a Multithreaded Processor", filed Oct. 23, 1997.
U.S. application Ser. No. 08/956,875, "An Apparatus and Method to Guarantee Forward Progress in a Multithreaded Processor", filed Oct. 23, 1997.
U.S. application Ser. No. 08/958,718, "Altering Thread Priorities in a Multithreaded Processor", filed Oct. 23, 1997.
U.S. application Ser. No. 08/956,577, "Method and Apparatus to Force a Thread Switch in a Multithreaded Processor", filed Oct. 23, 1997.

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