Performance monitoring in a storage enclosure

Data processing: measuring – calibrating – or testing – Measurement system – Remote supervisory monitoring

Reexamination Certificate

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Details

C710S018000

Reexamination Certificate

active

06629062

ABSTRACT:

FIELD OF INVENTION
This invention relates to an analyser of the performance of a bus included within a storage enclosure.
BACKGROUND OF INVENTION
Many types of peripheral devices can be interfaced to digital computers, of which, typical examples include mass storage devices, used by computers to store and retrieve information. Each type of peripheral requires a unique or device specific, interface. The American National Standards Institute has approved X
3.131-1986
, designated the Small Computer Systems Interface or SCSI, that allows a computer system to connect, to a plurality of devices, or SCSI targets, using high-level device independent commands.
Increasing demands on host computers and networks have required that data integrity and availability be of utmost importance. However, system performance limitations may be introduced as a result of inefficient system configuration, e.g., where a legacy device on the SCSI bus determines the overall bus speed. In such situations, it is clearly of benefit for a systems analyst to be able to monitor the performance of the network and optimise its configuration and/or diagnose faults.
Conventional analysers of SCSI bus performance are large and expensive stand-alone devices, which are usually only connected to a SCSI bus, when it is suspected that a problem exists thereon. Such stand-alone SCSI bus analysers also provide detailed analysis of bus traffic at resolutions as low as 4 nS, in addition to a wide range of user-selectable capture modes and triggering options.
DISCLOSURE OF INVENTION
The present invention provides a bus analyser for analysing the operation of a bus to which a plurality of devices are connectable, said devices being operatively coupled to a host device running a host application, said analyser being adapted to be housed in an enclosure which, in use, houses at least one of said devices and comprising:
means for extracting data from the bus,
means for processing extracted data; and
means for communicating processed data to an environmental control and monitoring unit through a secondary communication bus.
The invention extends the functionality of the system environmental control and monitoring unit to encompass an analysis of the bus itself, and by using the communication facilities of the monitoring unit, the footprint of the analyser can be made such that it can be housed within the enclosure and even with a card incorporating the control and monitoring unit itself.
A preferred embodiment provides a SCSI bus analyser designed to be sufficiently small and inexpensive to be included directly within a SCSI enclosure thereby enabling continuous on-line monitoring of the SCSI bus and the provision of an early warning system of SCSI bus performance degradation.
Preferably, the analyser does not provide as detailed an analysis of the SCSI bus performance as a conventional stand-alone SCSI analyser, however the invention does provide sufficient information to enable a network analyst to perform a status check of the system. Further, the invention preferably also provides information on issues which may assist the network analyst in fine-tuning the configuration of the network such as, which devices on the SCSI bus are most active over a given period of time and rates of data transmission and error messaging.
Preferably, the analyser fits on a single chip as opposed to the multiple chips and cards in existing stand-alone systems SCSI analysers.
Preferably, the monitoring unit comprises an Enclosure Services processor communicating with the bus controller by methods including the SCSI Enclosure Services (SES) or SCSI Access Fault Tolerant Enclosure (SAF-TE) protocols. The SES processor includes facilities for SCSI bus monitoring by the addition of:
a control page to enable a user to specify the levels of analysis of bus performance required; and
a status page containing processed data results from the analysis performed by the bus analyser.


REFERENCES:
patent: 5966510 (1999-10-01), Carbonneau et al.
patent: 6018809 (2000-01-01), Garrett
patent: 6510532 (2003-01-01), Pelly et al.
patent: 6513074 (2003-01-01), Dimitri et al.
patent: 2002/0044562 (2002-04-01), Killen et al.
patent: 2002/0046276 (2002-04-01), Coffey et al.
patent: 2002/0054477 (2002-05-01), Coffey et al.
patent: 2003/0051194 (2003-03-01), Cabezas et al.

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