Performance monitoring and test system for a telephone network

Multiplex communications – Diagnostic testing – Fault detection

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370362, 370248, H04J 116, H04J 314, G01R 3108, G06F 1100

Patent

active

059563249

ABSTRACT:
A DS3 level access, monitor and test system for a telephone network. The system provides selective, and hitless, bit overwrite in any of the embedded DS1, DS0 and subrate channels in a DS3 signal. Multiple DS0 and subrate channels can be tested via the asynchronous time slot interchange in conjunction with the recombiner of the present invention. The present invention further includes a lookahead reframer for framing to the DS3 signal. The present invention also includes a facilities data link (FDL) handler for capturing the FDL channel data in every DS1 channel in a DS3 signal. A high speed bit-for-bit compare is interfaced to a protect path to provide 1:1 fault protection in the system of the present invention. Full time performance monitoring on DS1 and DS3 signals is performed by a shared resource. The system of the present invention provides an integrated approach to synchronization measurement and relative synchronization.

REFERENCES:
patent: 4716561 (1987-12-01), Angell et al.
patent: 4993013 (1991-02-01), Shinada et al.
patent: 5018135 (1991-05-01), Ashi et al.
patent: 5138616 (1992-08-01), Wagner, Jr. et al.
patent: 5166925 (1992-11-01), Ward

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