Data processing: generic control systems or specific application – Specific application – apparatus or process – Product assembly or manufacturing
Reexamination Certificate
2001-11-02
2004-03-02
Picard, Leo (Department: 2125)
Data processing: generic control systems or specific application
Specific application, apparatus or process
Product assembly or manufacturing
C700S109000, C700S110000, C700S123000
Reexamination Certificate
active
06701202
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates generally to a plasma processing apparatus and system, a performance evaluation method therefor, a maintenance method therefor, a performance management system therefor, and a performance validation system therefor. More particularly, the present invention is directed to a technology suitable for ensuring that the plasma processing apparatus and system maintain the required level of performance even after the delivery of the apparatus and system to customers.
2. Description of the Related Art
FIG. 38
illustrates an example of a conventional dual-frequency excitation plasma processing apparatus which performs a plasma process such as a chemical vapor deposition (CVD) process, a sputtering process, a dry etching process, or an ashing process.
In the plasma processing apparatus shown in
FIG. 38
, a matching circuit
2
A is connected between a radiofrequency generator
1
and a plasma excitation electrode
4
. The matching circuit
2
A matches the impedances of the radiofrequency generator
1
and the excitation electrode
4
.
Radiofrequency power from the radiofrequency generator
1
is fed to the plasma excitation electrode
4
via the matching circuit
2
A and a feed plate
3
. The matching circuit
2
A is accommodated in a matching box
2
which is a housing composed of a conductive material. The plasma excitation electrode
4
and the feed plate
3
are covered by a chassis
21
made of a conductor.
The plasma excitation electrode
4
is provided with a projection
4
a
at the bottom face thereof. A shower plate
5
having many holes
7
provided under the plasma excitation electrode
4
is in contact with the projection
4
a
. The plasma excitation electrode
4
and the shower plate
5
define a space
6
. A gas feeding tube
17
composed of a conductive material is connected to the space
6
. The gas feeding tube
17
is provided with an insulator
17
a
at the middle thereof so as to insulate the plasma excitation electrode
4
and the gas source.
Gas from the gas feeding tube
17
is fed inside a plasma processing chamber
60
comprising a chamber wall
10
, via the holes
7
in the shower plate
5
. An insulator
9
is disposed between the chamber wall
10
and the plasma excitation electrode
4
(cathode) to provide insulation therebetween. The exhaust system is omitted from the drawing.
A wafer susceptor (susceptor electrode)
8
which receives a substrate
16
and also serves as another plasma excitation electrode is installed inside the plasma processing chamber
60
. A susceptor shield
12
is disposed under the wafer susceptor
8
.
The susceptor shield
12
comprises a shield supporting plate
12
A for supporting the susceptor electrode
8
and a supporting cylinder
12
B extending downward from the center of the shield supporting plate
12
A. The supporting cylinder
12
B extends through a chamber bottom
10
A, and the lower portion of the supporting cylinder
12
B and the chamber bottom
10
A are hermetically sealed with bellows
11
.
The shaft
13
and the susceptor electrode
8
are electrically isolated from the susceptor shield
12
by a gap between the susceptor shield
12
and the susceptor electrode
8
and by insulators
12
C provided around the shaft
13
. The insulators
12
C also serve to maintain high vacuum in the plasma processing chamber
60
. The susceptor electrode
8
and the susceptor shield
12
can be moved vertically by the bellows
11
in order to control the distance between plasma excitation electrodes
4
and
8
.
The susceptor electrode
8
is connected to a second radiofrequency generator
15
via the shaft
13
and a matching circuit accommodated in a matching box
14
. The chamber wall
10
and the susceptor shield
12
have the same DC potential.
FIG. 39
illustrates another example of a conventional plasma processing apparatus. Unlike the plasma processing apparatus shown in
FIG. 38
, the plasma processing apparatus shown in
FIG. 39
is of a single-frequency excitation type. In other words, a radiofrequency power is supplied only to the electrode
4
while the susceptor electrode
8
is grounded. Moreover, the matching box
14
and the second radiofrequency generator
15
shown in
FIG. 38
are not provided. The susceptor electrode
8
and the chamber wall
10
have the same DC potential.
In these plasma processing apparatuses, power with a frequency of approximately 13.56 MHz is generally supplied in order to generate a plasma between the electrodes
4
and
8
. A plasma process such as a plasma-enhanced CVD process, a sputtering process, a dry etching process, or an ashing process is then performed using the plasma.
The power consumption efficiency, i.e., the ratio of the power consumed in the plasma to the power supplied to the plasma excitation electrode
4
, of these plasma processing apparatuses has been poor. Especially as the frequency supplied from the radiofrequency generator is elevated, the power consumption efficiency of the plasma processing apparatus has decreased significantly. Moreover, use of large size substrates has caused the power consumption efficiency to further decrease.
As a result, conventional plasma processing apparatuses have suffered from low deposition rate as a result of failing to increase the effective power consumed in the plasma space due to a low power consumption efficiency. When applied to a deposition process, for example, insulating layers with high isolation voltage can barely be formed.
The operation validation and performance evaluation of the above-described plasma processing apparatuses have been conducted by actually performing the process such as deposition and then evaluating the deposition characteristics thereof according to following Procedures:
Procedure (1) Deposition Rate and Planar Uniformity
Step 1: Depositing a desired layer on a 6-inch substrate by a plasma-enhanced CVD process.
Step 2: Patterning a resist layer.
Step 3: Dry-etching the layer.
Step 4: Removing the resist layer by ashing.
Step 5: Measuring the surface roughness using a contact displacement meter to determine the layer thickness.
Step 6: Calculating the deposition rate from the deposition time and the layer thickness.
Step 7: Measuring the planar uniformity at 16 points on the substrate surface.
Procedure (2) BHF Etching Rate
A resist mask is patterned as in Steps 1 and 2 in (1) above.
Step 3: Immersing the substrate in a buffered hydrofluoric acid (BHF) solution for one minute to etch the layer.
Step 4: Rinsing the substrate with deionized water, drying the substrate, and separating the resist mask using a mixture of sulfuric acid and hydrogen peroxide (H
2
SO
4
+H
2
O
2
).
Step 5: Measuring the surface roughness as in Step 5 in Procedure (1) to determine the layer thickness after the etching.
Step 6: Calculating the etching rate from the immersion time and the reduced layer thickness.
Procedure (3) Isolation Voltage
Step 1: Depositing a conductive layer on a glass substrate by a sputtering method and patterning the conductive layer to form a lower electrode.
Step 2: Depositing an insulating layer by a plasma-enhanced CVD method.
Step 3: Forming an upper electrode as in Step 1.
Step 4: Forming a contact hole for the lower electrode.
Step 5: Measuring the current-voltage characteristics (I-V characteristics) of the upper and lower electrodes by using probes while applying a voltage up to approximately 200 V.
Step 6: Defining the isolation voltage as the voltage V at 100 pA corresponding 1 &mgr;A/cm
2
in a 100 &mgr;m square electrode.
The plasma processing apparatus for use in manufacturing semiconductors and liquid crystal displays has been required to achieve a higher plasma processing rate (the deposition rate or the processing speed), increased productivity, and improved planar uniformity of the plasma processing (uniformity in the distribution of the layer thickness in a planar direction and uniformity in the distribution of the process variation in the planar direction). As the size of substrates has been incr
Nakano Akira
Ohmi Tadahiro
Alps Electric Co. Ltd
Beyer Weaver & Thomas LLP
Masinick Michael D.
Picard Leo
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