Performance evaluation method for plasma processing...

Data processing: measuring – calibrating – or testing – Measurement system – Performance or efficiency evaluation

Reexamination Certificate

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C702S065000, C702S075000, C702S079000, C438S017000, C700S121000

Reexamination Certificate

active

06795796

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a plasma processing apparatus and to an evaluation method, a performance management system, and a performance validation system for the plasma processing apparatus and a plasma processing system. More particularly, the present invention is suitable for continuously securing the performance of the plasma processing apparatus to be maintained at a required level even after the plasma processing apparatus or system is delivered to a customer site.
2. Description of the Related Art
FIG. 22
illustrates an example of a conventional dual-frequency excitation plasma processing apparatus which performs a plasma process such as a chemical vapor deposition (CVD) process, a sputtering process, a dry etching process, or an ashing process.
In the plasma processing apparatus shown in
FIG. 22
, a matching circuit
2
A is inserted between a radiofrequency generator
1
and a plasma excitation electrode
4
. The matching circuit
2
A serves as a circuit that matches the impedance between the radiofrequency generator
1
and the excitation electrode
4
.
Radiofrequency power from the radiofrequency generator
1
is fed to the plasma excitation electrode
4
via the matching circuit
2
A and a feed plate
3
. The matching circuit
2
A is accommodated in a matching box
2
which is a housing composed of a conductive material. The plasma excitation electrode
4
and the feed plate
3
are covered by a chassis
21
made of a conductor.
The plasma excitation electrode
4
is provided with a projection
4
a
at the lower side thereof. A shower plate
5
having many holes
7
provided under the plasma excitation electrode
4
is in contact with the projection
4
a
. The plasma excitation electrode
4
and the shower plate
5
define a space
6
. A gas feeding tube
17
comprising a conductor is connected to the space
6
. The gas feeding tube
17
is provided with an insulator
17
a
at the middle thereof so as to insulate the plasma excitation electrode
4
and the gas source.
Gas from the gas feeding tube
17
is fed inside a chamber space
60
composed of a chamber wall
10
, via the holes
7
in the shower plate
5
. An insulator
9
is disposed between the chamber wall
10
and the plasma excitation electrode
4
(cathode) to provide insulation therebetween. The exhaust system is omitted from the drawing.
A wafer susceptor (susceptor electrode)
8
which receives a substrate
16
and also serves as a plasma excitation electrode is installed inside the chamber space
60
. A susceptor shield
12
is disposed under the wafer susceptor
8
.
The susceptor shield
12
comprises a shield supporting plate
12
A for receiving the susceptor electrode
8
and a cylindrical supporting cylinder
12
B extending downward from the center of the shield supporting plate
12
A. The supporting cylinder
12
B penetrates a chamber bottom
10
A, and the lower portion of the supporting cylinder
12
B and the chamber bottom
10
A are hermetically sealed with bellows
11
.
The shaft
13
and the susceptor electrode
8
are electrically isolated from the susceptor shield
12
by a gap between the susceptor shield
12
and the susceptor electrode
8
and by insulators
12
C provided around the shaft
13
. The insulators
12
C also serve to maintain high vacuum in the chamber space
60
. The susceptor electrode
8
and the susceptor shield
12
can be moved upward and downward by the bellows
11
in order to control the distance between plasma excitation electrodes
4
and
8
.
The susceptor electrode
8
is connected to a second radiofrequency generator
15
via the shaft
13
and a matching circuit accommodated in a matching box
14
. The chamber wall
10
and the susceptor shield
12
have equal DC potentials.
FIG. 23
illustrates another example of a conventional plasma processing apparatus. Unlike the plasma processing apparatus shown in
FIG. 22
, the plasma processing apparatus shown in
FIG. 23
is of a single-frequency excitation type. In other words, a radiofrequency power is supplied only to the cathode electrode
4
and the susceptor electrode
8
is grounded. Moreover, the matching box
14
and the radiofrequency generator
15
shown in
FIG. 18
are not provided. The susceptor electrode
8
and the chamber wall
10
have the same DC potential.
In these plasma processing apparatuses, power with a frequency of approximately 13.56 MHz is generally supplied in order to generate a plasma between the electrodes
4
and
8
. A plasma process such as a plasma-enhanced CVD process, a sputtering process, a dry etching process, or an ashing process is then performed using the plasma.
The operation validation and the evaluation of the above-described plasma processing apparatuses have been conducted by actually performing the process such as deposition and then evaluating the deposition characteristics thereof as follows.
(1) Deposition Rate and In-Plane Uniformity
The process of determining and evaluating deposition rates and planar uniformity includes the following.
Step 1: Depositing a desired layer on a 6-inch substrate by a plasma-enhanced CVD process.
Step 2: Patterning a resist layer.
Step 3: Dry-etching the layer.
Step 4: Separating the resist layer by ashing.
Step 5: Measuring step differences in the layer thickness using a contact-type displacement meter.
Step 6: Calculating the deposition rate from the deposition time and the layer thickness.
Step 7: Measuring the in-plane uniformity at 16 points.
(2) BHF Etching Rate
The process of determining etching rates includes the following.
A resist mask is patterned as in Steps 1 and 2 above.
Step 3: Immersing the substrate in a buffered hydrofluoric acid (BHF) solution for one minute.
Step 4: Rinsing the substrate with deionized water, drying the substrate, and separating the resist mask using a mixture of sulfuric acid and hydrogen peroxide (H
2
SO
4
+H
2
O
2
).
Step 5: Measuring the step difference as in Step 5 above.
Step 6: Calculating the etching rate from the immersion time and the step differences.
(3) Isolation Voltage
The process of determining and evaluating the isolation voltage includes the following.
Step 1: Depositing a conductive layer on a glass substrate by a sputtering method and patterning the conductive layer to form a lower electrode.
Step 2: Depositing an insulation layer by a plasma-enhanced CVD method.
Step 3: Forming an upper electrode as in Step 1.
Step 4: Forming a contact hole for the lower electrode.
Step 5: Measuring the current-voltage characteristics (I-V characteristics) of the upper and lower electrodes by using probes while applying a voltage of approximately 200 V or less.
Step 6: Defining the isolation voltage as the voltage V at 100 pA corresponding 1 &mgr;A/cm
2
in a 100 &mgr;m square electrode.
The plasma processing apparatus has been required to achieve a higher plasma processing rate (the deposition rate or the processing speed), increased productivity, and uniformity of the plasma processing in the in-plane direction of the substrates to be treated (uniformity in the distribution of the layer thickness in the in-plane direction and uniformity in the distribution of the process variation in the in-plane direction). As the size of substrates has been increasing in recent years, the requirement for uniformity in the in-plane direction is becoming tighter.
Moreover, as the size of the substrate is increased, the power required is also increased to the order of kilowatts, thus increasing the power consumption. Accordingly, as the capacity of the power supply increases, both the cost for developing the power supply and the power consumption during the operation of the apparatus are increased. In this respect, it is desirable to reduce the operation costs.
Furthermore, an increase in power consumption leads to an increase in emission of carbon dioxide which places a burden on the environment. Since the power consumption is increased by the combination of increase in the size of substrates and a low power consumption efficiency, there is a g

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