Performance control mechanism for alternately allowing instructi

Details Performance control mechanism for alternately allowing instructi Performance control mechanism for alternately allowing instructi

1989-08-14

1992-10-27

Lee, Thomas C.

Boots, shoes, and leggings

364DIG1, 3642645, 3642702, 3642715, 395800, G06F 928

Patent

active

051596750

ABSTRACT:
A data processor is provided with a mechanism for controlling its performance. The processor is allowed to run normally for R clock beats, and then further instruction starts are inhibited for W clock beats. The ratio W/R determines the level of performance of the processor.

REFERENCES:
patent: 4296465 (1981-10-01), Lemak
patent: 4481581 (1984-11-01), Johnson
patent: 4745544 (1988-05-01), Renner et al.
patent: 4908749 (1990-03-01), Marshall et al.
patent: 4910671 (1990-03-01), Kitamura et al.
patent: 5051742 (1991-09-01), Hullett et al.

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