PECVD air gap integration

Active solid-state devices (e.g. – transistors – solid-state diode – Integrated circuit structure with electrically isolated... – Including dielectric isolation means

Reexamination Certificate

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C257S773000

Reexamination Certificate

active

07009272

ABSTRACT:
A series of conductive layers separated by interlayer gaps is formed adjacent a substrate layer, the conductive layer and interlayer gap dimensions defining aspect ratios for trenches between the conductive layers. A layer of dielectric material is deposited over the conductive layers using plasma enhanced chemical vapor deposition. Trenches having aspect ratios within specified geometric categories are incompletely filled, leaving interlayer voids which may have desirable dielectric properties.

REFERENCES:
patent: 5476817 (1995-12-01), Numata
patent: 5512775 (1996-04-01), Cho
patent: 5863832 (1999-01-01), Doyle et al.
patent: 6091149 (2000-07-01), Hause et al.
patent: 6303487 (2001-10-01), Kagamihara
patent: 6376330 (2002-04-01), Fulford et al.
patent: 6762120 (2004-07-01), Nakagawa et al.

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