Peak program current reduction apparatus and method

Details Peak program current reduction apparatus and method Peak program current reduction apparatus and method

1999-12-20

2001-05-22

Nelms, David (Department: 2818)

Static information storage and retrieval

Powering

C365S242000

Reexamination Certificate

active

06236611

ABSTRACT:

FIELD OF THE INVENTION
This invention relates to apparatus and methods for reducing peak program current in MRAM type memories and the like.
BACKGROUND OF THE INVENTION
In the programming of a xn-bit memory, such as an n-bit tunnel junction MRAM memory or the like, there is a need for n-digit line currents I, or ‘n’ wordline currents I, or ‘n’ bitline currents I, where ‘n’ is the number of bits in a word, e.g. 16, 32, 64, etc. The total programming current of ‘n’ digitlines adds up to nI current which is an unacceptable level. For example, in a 256×16 bit memory, the programming of a 16 bit word requires 16 bitline currents, or 16I, to flow from the current supply. When 16I current flows through the current supply lines, which are made up of metal and vias connecting layers of metal together, the vias become prone to electromigration damage, or migration of the metal, due to the excessive current flow.
Accordingly it is highly desirable to provide apparatus which overcomes these problems and which is inexpensive and easy to install and use.


REFERENCES:
patent: 5534793 (1996-07-01), Nasserbakht

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