Peak level detection circuit

Details Peak level detection circuit Peak level detection circuit

1990-01-30

1991-06-18

Zazworsky, John

Electrical transmission or interconnection systems

Personnel safety or limit control features

Interlock

307359, H03K 5153

Patent

active

050251767

ABSTRACT:
A peak level detection circuit provided with a peak holding unit used for determining the threshold level for discrimination of the logics "1" and "0" of the received data from the peak level of the received data signals, wherein even if after a first input pulse train with a peak level of V.sub.in1 is received, a second input pulse train having a peak level of V.sub.in2 lower than V.sub.in1 is received, it is made possible to immediately discriminate the logics "1" and "0" of the second input pulse train by detecting the appearance of the second input pulse train, then immediately pulling down the V.sub.in1 which is held.

REFERENCES:
patent: 3508158 (1970-04-01), Marchese
J. E. Cunningham, Jr., "High Speed Peak Detector", IBM Technical Disclosure Bulletin, vol. 21, No. 9, Feb. 1979, pp. 3544-3545.

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