Peak hold circuit including a constant voltage generator

Miscellaneous active electrical nonlinear devices – circuits – and – Specific signal discriminating without subsequent control – By amplitude

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Details

327539, G11C 2702

Patent

active

059864818

ABSTRACT:
A peak hold circuit includes an error amplification circuit having a first transistor section receiving an input voltage and a second transistor section constituting a differential error amplifier together with the first transistor section. The second transistor section has a plurality of transistors connected in parallel so as to operate individually. The peak hold circuit also includes a switching circuit having a plurality of switching transistors operated in accordance with an operation voltage of each of the transistors of the second transistor section, a charging circuit including a capacitor, for charging the capacitor stage by stage in accordance with a switching operation of each of the switching transistors of the switching circuit, and an output circuit for outputting a charging potential of the capacitor as a peak value signal of the input voltage.

REFERENCES:
patent: 5298801 (1994-03-01), Vorekamp et al.
patent: 5315170 (1994-05-01), Vinn et al.
patent: 5512817 (1996-04-01), Nagaraj
patent: 5774013 (1998-06-01), Groe
patent: 5834927 (1998-11-01), Sugawara
patent: 5886571 (1999-03-01), Suwabe
patent: 5910749 (1999-06-01), Kimura

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