Peak hold circuit

Details Peak hold circuit Peak hold circuit

2009-06-12

2011-11-22

Donovan, Lincoln (Department: 2816)

Miscellaneous active electrical nonlinear devices, circuits, and

Specific signal discriminating without subsequent control

By amplitude

C327S091000

Reexamination Certificate

active

08063667

ABSTRACT:
A peak hold circuit includes an input transistor, which is provided with an input signal, and a first hold capacitor, which holds a maximum or minimum value of the input signal. A correction circuit, which corrects the hold voltage held by the first hold capacitor, includes an operational amplifier, which is supplied with the hold voltage, and a correction transistor, which is provided with an output signal of the operational amplifier. A source/emitter of the correction transistor is coupled to the operational amplifier. The peak hold circuit also includes a current detection circuit, which detects current flowing to the input transistor, and a peak current hold circuit, which holds the peak value of the current detected by the current detection circuit as a peak current and supplies the peak current to the correction transistor.

REFERENCES:
patent: 7109466 (2006-09-01), Park et al.
patent: 7518414 (2009-04-01), Romero et al.
patent: 7560959 (2009-07-01), Paraschou et al.
patent: 7573322 (2009-08-01), Gatta et al.
patent: 05-126869 (1993-05-01), None

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