Peak detection circuit with double peak detection stages

Details Peak detection circuit with double peak detection stages Peak detection circuit with double peak detection stages

2006-10-24

2006-10-24

Lam, Tuan T. (Department: 2816)

Miscellaneous active electrical nonlinear devices, circuits, and

Specific signal discriminating without subsequent control

By amplitude

C327S062000, C327S059000, C327S060000

Reexamination Certificate

active

07126384

ABSTRACT:
A peak detection circuit with double peak detection stages includes an analog peak detector, an analog-to-digital converter (ADC), and a digital peak detector. The analog peak detector receives an analog input signal, detects a peak value of the analog input signal with a first period, and outputs an analog peak signal. The ADC receives the analog peak signal and converts it into a digital signal. The digital peak detector receives the digital signal, detects the peak value of the digital signal with a second period longer than the first period, and outputs a digital peak signal. Therefore, the analog peak signal will not decay seriously due to the leakage and the digital peak signal can hold the digital peak value for a long time.

REFERENCES:
patent: 3835400 (1974-09-01), Briscoe
patent: 3878984 (1975-04-01), Sotiropoulos et al.
patent: 4373141 (1983-02-01), Sanders
patent: 4499586 (1985-02-01), Cafarella et al.
patent: 4709204 (1987-11-01), Hayakawa
patent: 5177560 (1993-01-01), Stimple et al.
patent: 5302863 (1994-04-01), Walley et al.
patent: 5666379 (1997-09-01), Ovard et al.

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