Miscellaneous active electrical nonlinear devices – circuits – and – Specific signal discriminating without subsequent control – By amplitude
Reexamination Certificate
1999-05-20
2001-03-13
Lam, Tuan T. (Department: 2816)
Miscellaneous active electrical nonlinear devices, circuits, and
Specific signal discriminating without subsequent control
By amplitude
C327S088000, C327S089000
Reexamination Certificate
active
06201419
ABSTRACT:
BACKGROUND OF THE INVENTION
The present invention relates to a peak detection circuit used in a device such as an Auto Gain Controlled Amplifier which detects a peak value of a predetermined signal.
FIG. 4
shows a peak detection circuit
101
according to a prior art. The peak detection circuit
101
includes a differential amplifier circuit comprising transistors Q
1
, Q
2
, resistive elements RL
1
, RL
2
, a first constant-current source CCS
1
, and an emitter-follower circuit comprising transistors Q
3
, Q
4
connected each other in the way of darlington connection. The peak detection circuit
101
also includes a pad PAD, a capacitive element CP and a second constant-current source CCS
2
.
One end of the resistive element RL
1
and one end of the resistive element RL
2
are commonly connected with a power source level VCC. The other end of the resistive element RL
1
is connected with a collector of the transistor Q
1
, whereas the other end of the resistive element RL
2
is connected with a collector of the transistor Q
2
and a base of the transistor Q
3
. The transistor Q
1
is controlled by an input signal In which is input to a base of the transistor Q
1
, and the transistor Q
2
is controlled by a reference signal Ref which is input to a base of the transistor Q
2
. Emitters of the transistors Q
1
, Q
2
are connected with a ground level GND through the first constant-current source CCS
1
which generates constant-current Ie.
Collectors of the transistor Q
3
, Q
4
are commonly connected with the power source level Vcc. An emitter of the transistor Q
3
is connected with a base of the transistor Q
4
and the pad PAD. The pad PAD is connected with one end of the capacitive element CP, and the other end of the capacitive element CP is connected with the ground level GND. An emitter of the transistor Q
4
is connected with the ground level GND through the second constant-current source CCS
2
which generates a constant-current If. Thus, an output signal Out of the peak detection circuit
101
is output from the emitter of the transistor Q
4
.
In the following, the operation of the peak detection circuit
101
according to the prior art having the above-mentioned structure is described. The input signal In input to the base of the transistor Q
1
is differentially amplified based on the reference signal Ref input to the base of the transistor Q
2
. The differentially amplified signal (referred as an amplifier signal Sa) is input to the base of the transistor Q
3
. At this step, if the voltage of the amplifier signal Sa is larger than the sum of the voltage of the capacitive element CP and the voltage between the base and the emitter (about 0.8 V) of the transistor Q
3
, the transistor Q
3
is turned on. With such operation of the transistor Q
3
, a signal of “H” level is input to the base of the transistor Q
4
, the emitter of which outputs the output signal OUT based on the constant-current If generated from the second constant-current source CCS
2
. In short, the peak detection circuit
101
according to the prior art detects a peak voltage value of the input signal In by means of the reference signal Ref. A peak voltage value of the input signal In can be adjusted with ease by changing the voltage of the reference signal Ref.
After the transistor Q
3
is turned off, the transistor Q
4
remain in the on state for a predetermined period depending on time spent for discharge of the capacitive element CP which has been charged by an emitter current of the transistor Q
3
. The period of the transistor Q
4
being kept in the on state is usually adjusted depending on the frequency of the input signal In. For example, in the case that the frequency of the input signal In is about 1 GHz, a capacitive element CP of some pFs is used in accordance with the frequency of the input signal. On the contrary, in the case that the frequency of the input signal In is about 100 GHz, a capacitive element CP of several hundreds pFs is required. When the peak detection circuit
101
is formed as a semiconductor integrated circuit, a chip capacitor (not shown) provided at the exterior of the circuit is connected with the pad PAD so as to match the frequency of the input signal In, because it is difficult to provide a capacitive element CP with a large capacitance of several hundreds pFs in the circuit.
However, in the peak detection circuit
101
according to the prior art, in the case that the chip capacitor connected with the capacitive element CP and pad PAD, is not charged enough, for example, immediately after rise of the power source voltage, when the input signal In is input and the transistor Q
3
is turned on, an excessive amount of current flows into the transistor Q
3
. This causes deterioration of the transistor Q
3
. The same problem is caused when the pad PAD is contacted with the ground level GND for some reason, or when inappropriate voltage had been input to the pad PAD at the experimental operation of the peak detection circuit
101
.
SUMMARY OF THE INVENTION
The present invention has been made in view of the above-mentioned problem, in association with the prior art peak detection circuit. Therefore an object of the invention is to provide a novel and improved peak detection circuit wherein a measure for protection from electric current is well achieved having a transistor to which an amplifier signal gained by amplifying the difference between a reference signal and an input signal is input.
In order to solve the above-mentioned problem, according to the first aspect of the invention, there is provided a peak detection circuit which detects a peak value of an input signal. The peak detection circuit according to the present invention is provided with a differential amplifier which amplifies the difference of the signal levels between a reference signal and the input signal and outputs an amplifier signal, a first transistor which includes a control electrode to which said amplifier signal is input, a first resistance one end of which is connected with a power source and the other end of which is connected with an input electrode of the first transistor, and a second resistance one end of which is connected with the control electrode and the other end of which is connected with the input electrode of the first transistor.
With this structure, if an output electrode of the first transistor is shorted to a ground level, and excess current flows from a power source to an input electrode, the electric potential difference between both ends of the first resistance is increased, and that of the second resistance is thereby decreased. Accordingly, electric current flowing into the input electrode of the first transistor is restrained with electric potential of the control electrode of the first transistor being lowered. As a result, the first transistor is protected against electric current.
According to the second aspect of the invention, there is provided a peak detection circuit which includes a differential amplifier which amplifies difference of signal levels between a reference signal and the input signal and outputs an amplifier signal, a first transistor which includes a control electrode to which said amplifier signal is input, a group of diodes including n diodes (n equals a natural number of one or more) connected serially in a forward direction, wherein a cathode electrode of a first diode is an input part thereof, and an anode electrode of a last diode is an output part thereof, and said input part is connected with the input electrode of the first transistor, and said output part is connected with the output electrode of the first transistor.
With this structure, if an output electrode of the first transistor is shorted to a ground level, and excess current flows from a power source to an input electrode, the electric current can be detoured through the diode group. Accordingly, the amount of electric current flowing into the input electrode of the first transistor is decreased, and the first transistor is thus protected against electric current.
The number of diod
Kunitz Norman N.
Lam Tuan T.
OKI Electric Industry Co., Ltd.
Venable
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