PCM compression by encoding runs of zeroes

Details PCM compression by encoding runs of zeroes PCM compression by encoding runs of zeroes

1985-09-30

1987-05-26

Safourek, Benedict V.

Pulse or digital communications

Repeaters

Testing

375122, 370118, H04B 1404, H04B 166

Patent

active

046690930

ABSTRACT:
The circuit comprises two registers (SR12, SR8) which temporarily memorize uncompressed and compressed PCM words, respectively. The uncompressed word is sequentially read and a counter (CNT) counts the number of zeroes present in the most significant positions of the absolute value of the word. The compressed word is composed, in the corresponding register, of the sign bit of the uncompressed word, followed by the counting bits of the counter and by the bits of the positions of the uncompressed word following those of the counted zeroes.

REFERENCES:
patent: 3594560 (1971-07-01), Stanley
patent: 4002841 (1977-01-01), Ching et al.
patent: 4486876 (1984-12-01), Gaunt, Jr. et al.

Affiliated with

Also associated with

Rating

PCM compression by encoding runs of zeroes does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with PCM compression by encoding runs of zeroes, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and PCM compression by encoding runs of zeroes will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-708591