Electrical computers and digital processing systems: processing – Processing architecture – Array processor
Reexamination Certificate
1999-03-31
2001-12-11
Coulter, Kenneth R. (Department: 2154)
Electrical computers and digital processing systems: processing
Processing architecture
Array processor
C709S226000, C710S013000, C710S108000, C710S036000
Reexamination Certificate
active
06330656
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Technical Field
The present invention generally relates to multiprocessor computer systems, and more particularly to resource allocation among processors in a partitioned multiprocessor system. Still more particularly, the preferred embodiments relate to a system for partitioning and allocating individual PCI slots in a multiprocessor computer system.
2. Description of the Related Art
Multiprocessor computer systems are well known in the art, and provide for increased processing capability by allowing processing tasks to be divided among several different system processors. In conventional systems, each processor is able to access all of the system resources; i.e., all of the system resources, such as memory and I/O devices, are shared between all of the system processors. Typically, some parts of a system resource may be partitioned between processors, e.g., while each processor will be able to access a shared memory, this memory is divided such that each processor has its own workspace.
More recently, symmetric multiprocessor (SMP) systems have been partitioned to behave as multiple independent computer systems. For example, a single system having eight processors might be configured to treat each of the eight processors (or multiple groups of one or more processors) as a separate system for processing purposes. Each of these “virtual” systems would have its own copy of the operating system, and may then be independently assigned tasks, or may operate together as a processing cluster, which provides for both high-speed processing and improved reliability. Typically, in a multiprocessor system, there is also a “service” processor, which manages the startup and operation of the overall system, including system configuration and data routing on shared buses and devices, to and from specific processors.
When several virtual systems, in a single multiprocessor system, are configured to operate as a cluster, software support must be provided to allow each cluster node to communicate with each other node in the multiprocessor to perform quorum negotiation and validation, send “heartbeats,” and perform other quorum functions using any cluster communication technique. When this is accomplished, if one of the processors fails, which would cause that node to become unavailable to the cluster, the jobs assigned to that node can be reassigned among the remaining processors (nodes), using standard cluster techniques.
Typically, when a multiprocessor system is divided into multiple virtual systems, each of the virtual systems has its own copy of the operating system, and the same operating system is used for each virtual system. Since each processor is running the same operating system, it is relatively easy to provide for resource allocation among the processors.
Currently, however, there is a market requirement for the ability to run more than one operating system among the several virtual systems. For example, a user may wish to run a UNIX-variant operating system in one partition, and a “Windows” based operating system in a second partition. This need presents particular problems related to resource allocation; while division of memory between partitions in a multiprocessor system is generally supported in hardware, the allocation of other resources, such as Peripheral Component Interconnect (PCI) slots, is managed by the operating system. Since the multiple partitions may each be running a different operating system, there is a need for a means to allocate system resources which is not based on the operating system. In particular, there is a need for an operating system-independent solution which allows a system resource such as a PCI slot to be allocated among multiple partitions in a multiprocessor computer system.
SUMMARY OF THE INVENTION
It is therefore one object of the present invention to provide a system for the operation of a multiprocessor computer system.
It is another object of the present invention to provide a system for improved resource allocation within a multiprocessor computer system.
It is yet another object of the present invention to provide a system for partitioning and allocating individual PCI slots in a multiprocessor computer system.
The foregoing objects are achieved as is now described. A system for partitioning and allocating individual PCI slots within a Primary Host Bridge (PHB) in a partitioned computer system is provided. An innovative PHB system is included which allows a PCI slot to be dynamically assigned to one or more partitions at a given time, allowing for more efficient allocation of system resources.
The above as well as additional objectives, features, and advantages of the present invention will become apparent in the following detailed written description.
BRIEF DESCRIPTION OF THE DRAWINGS
The novel features believed characteristic of the invention are set forth in the appended claims. The invention itself, however, as well as a preferred mode of use, further objectives, and advantages thereof, will best be understood by reference to the following detailed description of an illustrative embodiment when read in conjunction with the accompanying drawings, wherein:
FIG. 1
is a block diagram of an exemplary computer system in accordance with a preferred embodiment of the present invention;
FIG. 2
depicts a high-level block diagram of a partitioned computer system in accordance with a preferred embodiment of the present invention;
FIG. 3
is a more detailed block diagram of an eight-processor computer system in accordance with a preferred embodiment of the present invention;
FIG. 4
depicts an improved PCI host bridge in accordance with a preferred embodiment of the present invention;
FIG. 5
is a partition descriptor table in accordance with a preferred embodiment of the present invention;
FIG. 6
is a flowchart of a system configuration process in accordance with a preferred embodiment of the present invention;
FIG. 7A
shows a processor-initiated PCI write in accordance with a preferred embodiment of the present invention;
FIG. 7B
shows a memory write initiated by a PCI device in accordance with a preferred embodiment of the present invention;
FIG. 8A
shows an exclusive-ownership slot removal operation in accordance with a preferred embodiment of the present invention;
FIG. 8B
shows an exclusive-ownership slot addition operation in accordance with a preferred embodiment of the present invention;
FIG. 9
shows a multiple-ownership slot removal operation in accordance with a preferred embodiment of the present invention; and
FIGS. 10A and 10B
show a multiple-ownership slot addition operation in accordance with a preferred embodiment of the present invention.
REFERENCES:
patent: 6247109 (2001-06-01), Kleinsorge et al.
Bealkowski Richard
Bland Patrick M.
Bracewell & Patterson LLP
Coulter Kenneth R.
International Business Machines - Corporation
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