Patterning method using stacked structure

Semiconductor device manufacturing: process – Chemical etching – Vapor phase etching

Reexamination Certificate

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C438S738000, C257SE21035, C257SE21039

Reexamination Certificate

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08071487

ABSTRACT:
A stacked structure for patterning a material layer to form an opening pattern with a predetermined opening width in the layer is provided. The stacked structure includes an underlayer, a silicon rich organic layer, and a photoresist layer. The underlayer is on the material layer. The silicon rich organic layer is between the underlayer and the photoresist layer. The thickness of the photoresist layer is smaller than that of the underlayer and larger than two times of the thickness of the silicon rich organic layer. The thickness of the underlayer is smaller than three times of the predetermined opening width.

REFERENCES:
patent: 6025117 (2000-02-01), Nakano et al.
patent: 2002/0086547 (2002-07-01), Mui et al.
patent: 2003/0219973 (2003-11-01), Townsend et al.
patent: 1450595 (2003-10-01), None
patent: 1472599 (2004-02-01), None
patent: 510020 (2002-11-01), None
Ruzyllo, J.; “Semiconductor Glossary”; 2004; Prosto Multimedia Publishing; p. 50.

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