Patterning method for reducing hillock density in thin metal fil

Coating processes – Electrical product produced – Integrated circuit – printed circuit – or circuit board

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357 68, 357 6, 427 88, 427 89, 427 90, 427 93, H01L 21285

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045257337

ABSTRACT:
Hillock formation in a thin film of metal having a high coefficient of thermal expansion on a substrate having a low coefficient of thermal expansion is reduced by patterning the substrate in an area normally free from such pattern, specifically for the purpose of reducing hillocks, prior to formation of the thin metal film, with a bas-relief pattern of lands and valleys, having a depth dimension on the same order of magnitude as the thickness of the film.

REFERENCES:
patent: 3986897 (1976-10-01), McMillan et al.
patent: 4012756 (1977-03-01), Chaudhari et al.
patent: 4178396 (1979-12-01), Okano
patent: 4291068 (1981-09-01), Jones
patent: 4307131 (1981-12-01), Moutou
Journal of Applied Physics, 52(7), Jul. 1981, "Hillock-free Integrated Circuit Metallizations by Al/Al-O Layering" by T. J. Faith.
Journal Vacuum Science and Tech., 9(1), 515-519 (1972) "Hillock Growth on Vacuum Deposited Aluminum Films" by D. S. Herman, M. A. Schuster and R. M. Gerber.
Semiconductor International, Apr. 1982, p. 135, "Reduction of Hillock Formation in Aluminum Thin Films" by C. P. Lim.

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