Pattern registration mark designs for use in...

Active solid-state devices (e.g. – transistors – solid-state diode – Alignment marks

Reexamination Certificate

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C257SE23179, C438S401000

Reexamination Certificate

active

07449792

ABSTRACT:
Pattern registration marks which include: a substrate and an upper material layer disposed above the substrate; an outer trench formed in the upper material layer, the outer trench having an outer trench width; an inner trench formed in the upper material layer, the inner trench having an inner trench width; and a conformal layer disposed in the inner trench and the outer trench, the conformal layer having a conformal layer thickness; wherein the outer trench width is greater than twice the conformal layer thickness, and wherein the inner trench width is less than or equal to twice the conformal layer thickness; and methods of using the same.

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patent: 6083807 (2000-07-01), Hsu
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patent: 6172409 (2001-01-01), Zhou
patent: 6303460 (2001-10-01), Iwamatsu
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patent: 6697698 (2004-02-01), Yoshitake et al.
patent: 6801313 (2004-10-01), Yokota
patent: 6809420 (2004-10-01), Wong
patent: 7033904 (2006-04-01), Kirikoshi et al.
patent: 7190824 (2007-03-01), Chen
patent: 7192845 (2007-03-01), Yen et al.
patent: 7196429 (2007-03-01), Yen et al.
patent: 2001/0048145 (2001-12-01), Takeuchi et al.
patent: 2005/0051909 (2005-03-01), Inomata

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