Pattern noise reduction method and apparatus for solid state ima

Facsimile and static presentation processing – Facsimile – Recording apparatus

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358167, H04N 314, H04N 530

Patent

active

043921574

ABSTRACT:
Pattern noise in the output signal produced by an array of solid state light responsive elements is reduced by adjusting the responses of a subset of elements towards an average element response, thereby reducing the standard deviation of the element response distribution. The elements receiving response adjustments have responses in the upper and lower extremes of the element response distribution as determined by measuring the output of the sensor under controlled illumination conditions. A pattern noise reducing circuit includes: (1) means for deriving a set of response adjustment signals representing (a) the locations in the array of a subset of elements having responses in the upper and lower extremes of the element response distribution and (b) amounts of adjustment to the responses of said subset of elements to move said element responses toward an average response, and (2) means for applying to the signals representing the imagewise responses of said subset of elements, adjustments corresponding to said response adjustment signals, to produce imagewise output signals having reduced pattern noise. According to a further feature of the invention, redundancy reducing coding (e.g. run length coding) is employed to code the locations of the adjusted elements in the memory, thereby reducing the required size of the memory.

REFERENCES:
patent: 3800078 (1974-03-01), Cochran et al.
patent: 3800079 (1974-03-01), McNeil et al.
patent: 3904818 (1975-09-01), Kovac
patent: 3949162 (1976-04-01), Malueg
patent: 4032975 (1977-06-01), Malueg et al.
patent: 4167754 (1979-09-01), Nagumo et al.
patent: 4167755 (1979-09-01), Nagumo
patent: 4228468 (1980-10-01), Nagano et al.

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