Static information storage and retrieval – Addressing
Patent
1979-03-23
1980-08-05
Fears, Terrell W.
Static information storage and retrieval
Addressing
365 73, G11C 1140
Patent
active
042165334
ABSTRACT:
A plurality of low-speed memories having stored therein a plurality of patterns and first and second high-speed memories of higher operating speed than the low-speed memories are provided. One of the first and second high-speed memories is read to obtain output patterns and, at the same time, the plurality of low-speed memories are simultaneously read and the read-out data are successively written in the other high-speed memory alternately with each other. Upon completion of pattern generation from the one high-speed memory, pattern generation from the other high-speed memory is achieved.
REFERENCES:
patent: 4064558 (1977-12-01), Hughes et al.
Ichimiya Yoshichika
Shimada Katsumi
Sudo Tsuneta
Fears Terrell W.
Nippon Telegraph and Telephone Public Corporation
Takeda Riken Kogyo Kabushikikaisha
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