Pattern forming method

Details Pattern forming method Pattern forming method

1999-08-23

2000-11-14

Berman, Jack

Radiant energy

Irradiation of objects or material

Irradiation of semiconductor devices

2504911, H01J 37304

Patent

active

061473553

ABSTRACT:
To achieve down-sizing and improvements of throughputs, light exposure and charge beam exposure are sometimes used together. In case of performing exposure of a desired pattern in a plurality of stages, a positional displacement of each of exposure patterns in the stages leads to a decrease in exposure accuracy. According to the present invention, in case of forming a fine pattern by exposure after exposure of a rough pattern, the exposure position of the rough pattern is adjusted, based on a latent image of the rough pattern which has been subjected to exposure. As a result, a positional displacement between rough and fine patterns is reduced so that a desired pattern can be formed with high accuracy.

REFERENCES:
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patent: 5783340 (1998-07-01), Farino et al.
patent: 5863680 (1999-01-01), Kawakubo et al.
F. Benistant et al.,A Heavy Ion Implanted Pocket 1.10 .mu.m n-type Metal-Oxide-Semiconductor Field Effect Transistor With Hybrid Lithography (Electron-Beam/Deep Ultravoilet) and Specific Gate Passivation Process), J. Vac. Sci. Technol. B. 14 (6) : 4051-4054 (1996).
R. Jonckheere et al., "Electron Beam/DUV Intra-Level Mix-and Match Lithography for Random Logic 0.25 .mu.m CMOS", Microelectronic Engineering 27: 231-234 (1995).

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