Pattern formed on the ground layer of a multilayer printed...

Details Pattern formed on the ground layer of a multilayer printed... Pattern formed on the ground layer of a multilayer printed...

2005-12-22

2008-08-05

Sikder, Selina (Department: 2912)

Equipment for production, distribution, or transformation of ene

Distribution, modification or control

Semiconductor, transistor or integrated circuit

Design Patent

active

D0574339

CLAIM:
The ornamental design for a pattern formed on the ground layer of a multilayer printed circuit board, as shown and described.

REFERENCES:
patent: 3819989 (1974-06-01), Braune
patent: 4524239 (1985-06-01), Rouge
patent: 4791238 (1988-12-01), Kanno et al.
patent: 5855988 (1999-01-01), Matsuo
patent: 5999097 (1999-12-01), Liddle et al.
patent: 6380493 (2002-04-01), Morita et al.
patent: D457146 (2002-05-01), Yamamoto et al.
patent: 6385035 (2002-05-01), Matoba et al.
patent: 2002/0075660 (2002-06-01), Samant et al.
patent: 2005/0018409 (2005-01-01), Hirakata
patent: 2006/0175082 (2006-08-01), Tanaka
patent: 2006/0246268 (2006-11-01), Honjo et al.

Affiliated with

Also associated with

Rating

Pattern formed on the ground layer of a multilayer printed... does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Pattern formed on the ground layer of a multilayer printed..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Pattern formed on the ground layer of a multilayer printed... will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-4006816