Boots – shoes – and leggings
Patent
1988-02-26
1990-08-21
Lall, Parshotam S.
Boots, shoes, and leggings
364489, 364488, 250400, 2504923, G06F 1540, H01J 37302
Patent
active
049512161
ABSTRACT:
A re-size circuit extracts the bit data of a pattern to be drawn, at a specific address and its adjacent addresses of a pattern to be drawn, from a bit map memory storing LSI pattern data. For the Data at the adjacent addresses, either "0" or "1" re-size parameter data is set according to the contents of the re-size directions. The thickness of the pattern is altered by means of the logical operation of the data at the adjacent addresses and the re-size parameter data.
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patent: 4718019 (1988-01-01), Fillion et al.
patent: 4807159 (1989-02-01), Komatsu et al.
Lall Parshotam S.
Toshiba Machine Company, Ltd.
Trans V. N.
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