Passive ceramic component

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Reexamination Certificate

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C428S428000, C428S432000, C428S433000, C428S434000, C428S450000, C428S458000, C428S469000, C428S697000, C428S699000, C428S701000, C428S702000, C428S698000, C361S301400, C361S311000, C361S321100, C361S321500

Reexamination Certificate

active

06503609

ABSTRACT:

BACKGROUND OF THE INVENTION
The invention relates to a pasive ceramic component with a carrier substrate, at least one first electrode, at least a first barrier layer, at least one dielectric, and at least one second electrode.
Thin film capacitors usually comprise a carrier substrate, a dielectric, and two electrodes. Silicon provided with a passivating layer, a ceramic material, a glass-ceramic material, or a glass material may be used for the carrier substrate. The electrodes of a thin film capacitor may be made from a noble metal or a non-noble metal. Only well-insulating materials such as, for example, ceramic materials or insulating layers provided by a thin film technique are suitable for the dielectric.
The components are subjected to temperatures of 200 to 600° C. in the manufacture of thin film capacitors. These high temperatures are necessary for ensuring a sufficient adhesion of the individual layers of the thin film capacitors to one another, and in particular of the lower layer to the carrier substrate or the passivating layer, if present. These temperatures are necessary furthermore for improving the electrical quality of the dielectric.
Different coefficients of thermal expansion of the individual layers may cause cracks in the dielectric at these high temperatures. Metal atoms of the electrodes may diffuse into these hollow cracks and in an extreme case cause a short-circuit between the two electrodes of the thin film capacitor. Without the formation of cracks, however, it is also possible for metal atoms of the electrodes to diffuse into the dielectric and cause short-circuits there, given the elevated manufacturing temperatures.
To counteract this problem, a so-called barrier layer may be provided between the dielectric and an electrode. A thin film capacitor is known from U.S. Pat. No. 3,596,370, wherein a barrier layer of aluminum oxide or aluminum chromate is applied between the lower electrode and the dielectric.
A disadvantage of the described thin film capacitor is that on the one hand aluminum chromate is toxic and on the other hand aluminum oxide is a material with a considerable surface roughness, which may enter into undesirable reactions with the dielectric. In addition, aluminum oxide is itself a dielectric with an ∈
r
value, so that a stack of dielectrics is present in this thin film capacitor which can influence the characteristics of the thin film capacitor.
SUMMARY OF THE INVENTION
The invention has for its object to provide an improved thin film capacitor.
This object is achieved by means of a passive ceramic component with a carrier substrate, at least one first electrode, at least a first barrier layer, at least one dielectric, and at least one second electrode, in that the barrier layer comprises:
Ti
x
W
y
(0≦x≦1, 0≦y≦1),
Cr,
Cr
x
O
y
(0≦x≦1, 0≦y≦1),
Nb,
Ta,
Ti,
W,
Ni
x
Mo
y
(0≦x≦1, 0≦y≦1),
Ir
x
Ta
y
(0≦x≦1, 0≦y≦1),
Ir
x
Zr
y
(0≦x≦1, 0≦y≦1),
Fe
x
W
y
(0≦x≦1, 0≦y≦1),
Ni
x
Nb
y
(0≦x≦1, 0≦y≦1),
W
x
Si
y
(0≦x≦1, 0≦y≦1),
Pt
x
Si
y
(0≦x≦1, 0≦y≦1),
Ta
x
Si
y
N
z
(0≦x≦1, 0≦y≦1, 0≦z≦1),
Ti
x
Si
y
N
z
(0≦x≦1, 0≦y≦1, 0≦z≦1),
Mo
x
Si
y
N
z
(0≦x≦1, 0≦y≦1, 0≦z≦1),
Co
x
Si
y
(0≦x≦1, 0≦y≦1),
Cr
x
Si
y
(0≦x≦1, 0≦y≦1),
Cr
x
Si
y
N
z
(0≦x≦1, 0≦y≦1),
Cr
x
Si
y
O
z
(0≦x≦1, 0≦y≦1, 0≦z≦1),
Ti
x
N
y
(0≦x≦1, 0≦y≦1),
W
x
N
y
(0≦x≦1, 0≦y≦1),
Ti
x
W
y
N
z
(0≦x≦1, 0≦y≦1, 0≦z≦1),
Hf
x
N
y
(0≦x≦1, 0≦y≦1),
Ta
x
N
y
(0≦x≦1, 0≦y≦1),
Ru
x
O
y
(0≦x≦1, 0≦y≦1),
Mo
x
O
y
(0≦x≦1, 0≦y≦1),
Ir
x
O
y
(0≦x≦1, 0≦y≦1) or
Ni
x
Cr
y
Al
z
(0≦x≦1, 0≦y≦1, 0≦z≦1), or combinations of these materials.
This thin film capacitor has the advantage that the barrier layer comprises a material without interfering dielectric properties.
In a preferred embodiment, a further barrier layer is present between the dielectric and the second electrode, which further barrier layer comprises:
Ti
x
W
y
(0≦x≦1, 0≦y≦1),
Cr,
Cr
x
O
y
(0≦x≦1, 0≦y≦1),
Nb,
Ta,
Ti,
W,
Ni
x
Nb
y
(0≦x≦1, 0≦y≦1),
Ni
x
Mo
y
(0≦x≦1, 0≦y≦1),
Ir
x
Ta
y
(0≦x≦1, 0≦y≦1),
Ir
x
Zr
y
(0≦x≦1, 0≦y≦1),
Fe
x
W
y
(0≦x≦1, 0≦y≦1),
W
x
Si
y
(0≦x≦1, 0≦y≦1),
Pt
x
Si
y
(0≦x≦1, 0≦y≦1),
Ta
x
Si
y
N
z
(0≦x≦1, 0≦y≦1, 0≦z≦1),
Ti
x
Si
y
N
z
(0≦x≦1, 0≦y≦1, 0≦z≦1),
Mo
x
Si
y
N
z
(0≦x≦1, 0≦y≦1, 0≦z≦1),
Co
x
Si
y
(0≦x≦1, 0≦y≦1),
Cr
x
Si
y
(0≦x≦1, 0≦y≦1),
Cr
x
Si
y
N
z
(0≦x≦1, 0≦y≦1),
Cr
x
Si
y
O
z
(0≦x≦1, 0≦y≦1, 0≦z≦1),
Ti
x
N
y
(0≦x≦1, 0≦y≦1),
W
x
N
y
(0≦x≦1, 0≦y≦1),
Ti
x
W
y
N
z
(0≦x≦1, 0≦y≦1, 0≦z≦1),
Hf
x
N
y
(0≦x≦1, 0≦y≦1),
Ta
x
N
y
(0≦x≦1, 0≦y≦1),
Ru
x
O
y
(0≦x≦1, 0≦y≦1),
Mo
x
O
y
(0≦x≦1, 0≦y≦1),
Ir
x
O
y
(0≦x≦1, 0≦y≦1),
Ni
x
Cr
y
Al
z
(0≦x≦1, 0≦y≦1, 0≦z≦1), or combinations of these materials. This barrier layer prevents undesirable reactions between the dielectric and the second electrode. In addition, the above materials have no dielectric properties which interfere with the characteristics of the thin film capacitor.
It may furthermore be preferred that an adhesion layer of Ti, Cr, Ni
x
Cr
y
(0≦x≦1, 0≦y≦1) or Ti
x
W
y
(0≦x≦1, 0≦y≦1) is provided between the carrier substrate and the first electrode. This adhesion layer improves the adhesion between the carrier substrate and the first electrode.
It is also advantageous when at least a first and a second current supply contact are provided at mutually opposed sides of the component. Each thin film capacitor can be electrically connected to further components of a circuit by means of said current supply contacts. Depending on the type of application or mounting method, an electroplated SMD end contact, a bump end contact, or a via may be used for this. The use of SMD end contacts or bump end contacts renders possible the manufacture of discrete thin film capacitors, while the use of vias enables a direct integration of the component in ICs.
Preferably, a ceramic material, a glass-ceramic material, a glass material, or silicon is used for the carrier substrate. A carrier substrate of a ceramic or glass-ceramic material or a glass substrate can be inexpensively manufactured, so that the process cost for the relevant components can be kept low. The carrier substrate will be made of silicon if multiple-component units are to be incorporated in ICs.
Preferably, the dielectric comprises Si
3
N
4
,
Ta
2
O
5
,
SiO
2
,
Si
x
N
y
O
z
(0≦x≦1, 0≦y≦1, 0≦z≦1),
SiO
2
/Si
3
N
4
/SiO
2
,
Ba
1−x
Sr
x
TiO
3
(0≦x≦1)
SrTi
1−x
Zr
x
O
3
(0≦x≦1) with and without Mn as a dopant,
BaO—Ln
2
O
3
—TiO
2
(Ln=La. Ce, Nd, Sm or Eu),
Al
2
O
3
,
Ba
2
Ti
9
O
20
,
Ba
2
Ti
9−x
Zr
x
O
20
(0≦x≦1) with and without Mn as a dopant,
BaTi
5
O
11
,
BaTi
4
O
9
,
Nb
2
O
5
,
TiO
2
,
(Ta
2
O
5
)
x
—(Al
2
O
3
)
1−x
(0≦x≦1),
(Ta
2
O
5
)
x
—(TiO
2
)
1−x
(0≦x≦1),
(Ta
2
O
5
)
x
—(Nb
2
O
5
)
1−x
(0≦x≦1),
(Ta
2
O
5
)
x
—(SiO
2
)
1−x
(0≦x≦1),
(Sr,Ca)(Ti,Zr)O
3
,
BaO—SrO—CaO—Nd
2
O
3
—Gd
2
O
3
—Nb
2
O
3
—TiO
2
,
CaSm
2
Ti
5
O
14
,
Zr(Ti,Sn)O
4
,
BaO—PbO—Nd
2
O
3
—Pr
2
O
3
—Bi
2
O
3
—TiO
2
,
Ba(Zr,Zn,Ta)O
3
,
CaTiO
3
—LaAlO
3
,
(Bi
3
(Ni
2
Nb)O
9
)
1−x
(0≦x≦
1
),
(Bi
2
(ZnNb
2(1+d)y
O
3+6y+5yd
)
x
,
(0≦x≦1, 0.5≦y≦1.5, −0.05≦d≦0.05)
Pb(Zr
x
Ti
1−x
)O
3
(0≦x≦1) with and without excess lead,
Pb
1−&agr;y
La
y
(Zr
x
Ti
1−x
)O
3
(0≦x≦1, 0≦y≦0.2, 1.3≦&agr;≦1.5),
Pb
1−&agr;y
La
y
TiO
3
(0≦y≦0.3, 1.3≦&agr;≦1.5),

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