Patent
1977-07-20
1979-01-09
Wojciechowicz, Edward J.
357 52, 357 55, 357 59, H01L 2904
Patent
active
041341252
ABSTRACT:
Disclosed is a method and structure for protecting circuit components from the ambient and in particular for protecting the contact metal from the adverse effects of moisture. A first layer of amorphous silicon is deposited over the circuit including the metal contacts. A second layer which may be silicon nitride or silicon dioxide is then deposited over the amorphous silicon. The amorphous silicon layer reduces cracking in the second layer and prevents cracks in the second layer from propagating to the circuit components.
REFERENCES:
patent: 3189973 (1965-06-01), Edwards et al.
patent: 3271632 (1966-09-01), Hartmann
patent: 3465209 (1969-09-01), Denning et al.
patent: 3597667 (1971-08-01), Horn
patent: 3971061 (1976-07-01), Matsushita et al.
patent: 4062707 (1977-12-01), Mochizuki et al.
Adams Arthur C.
Capio Cesar D.
Levinstein Hyman J.
Murarka Shyam P.
Bell Telephone Laboratories Incorporated
Birnbaum Lester H.
Wojciechowicz Edward J.
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