Passivation layer for molecular electronic device fabrication

Semiconductor device manufacturing: process – Having biomaterial component or integrated with living organism

Reexamination Certificate

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Details

C438S397000

Reexamination Certificate

active

06835575

ABSTRACT:

TECHNICAL FIELD
This invention relates to systems and methods for fabricating molecular electronic devices.
BACKGROUND
Many different molecular electronic logic and memory devices have been proposed.
For example, in one molecular electronic device structure, a molecular layer (e.g., a Langmuir-Blodgett film) is sandwiched between a pair of electrically conducting layers (e.g., a pair of metal layers, a metal layer and a doped semiconductor layer, or a pair of doped semiconductor layers). The molecular layer serves as a thin insulating film that may be used in a metal-insulator-metal (MIM) structure that may be configured as a tunnel junction device or a switching device, or a metal-insulator-semiconductor (MIS) structure that may be configured as a logic device or an electroluminescent device.
U.S. Pat. No. 6,128,214 describes another molecular electronic device structure that is configured as a molecular wire crossbar memory (MWCM) system formed from a two-dimensional array of nanometer-scale devices. Each MWCM device is formed at the crossing point (or junction) of a pair of crossed wires where at least one molecular connector species operates as a bi-stable molecular switch between the pair of crossed wires. The resulting device structure may be configured as a resistor, a diode or an asymmetric non-linear resistor. The state of each MWCM device may be altered by applying a relatively high, but non-destructive state-changing voltage and may be sensed with a non-state-changing voltage.
Still other molecular electronic devices have been proposed.
SUMMARY
The invention features a novel process of fabricating a molecular electronic device that preserves the integrity of the active molecular layer of the electronic device during processing. In addition, the invention features a novel molecular electronic device structure and a novel memory system that are formed with this fabrication process.
In one aspect, the invention features a method of fabricating a molecular electronic device having a molecular layer disposed between a bottom wire layer and a top wire layer. In accordance with this inventive method a passivation layer is provided to protect the molecular layer from degradation during patterning of a top wire layer.
Embodiments of the invention may include one or more of the following features.
A selected region of the passivation layer preferably is etched away. A selected region of the passivation layer preferably may be converted from an electrical conductor to an electrical resistor or from an electrical insulator to an electrical conductor.
In one embodiment, an isolation passivation region surrounding the molecular electronic device is converted from an electrical conductor to an electrical insulator. For example, the passivation layer may be a metal layer and the isolation passivation region may be converted to an electrical insulator by oxidation.
In another embodiment, a device passivation region that is disposed between the top wire layer and the bottom wire layer is converted from an electrical insulator to an electrical conductor. For example, the passivation layer may have an antifuse structure, and the device passivation region may be converted to an electrical conductor by applying an electric voltage across the device passivation region.
In one embodiment, the selected passivation region is converted to define the top wire layer. In this embodiment, an unconverted passivation region corresponds to the top wire layer.
In some embodiments, a patterned top wire layer is disposed over the passivation layer. The top wire layer may be patterned by disposing a lift-off layer over the passivation layer, disposing an electrically conductive layer over the lift-off layer, and dissolving the lift-off layer.
In another aspect, the invention features a molecular electronic device that includes a bottom wire layer, a molecular layer disposed over the bottom wire layer in a device region, and a passivation layer. The passivation layer is disposed over the molecular layer and has an electrical conductor region and an electrical insulator region.
In another aspect, the invention features a molecular memory system that includes an array of the above-described molecular electronic devices.
Other features and advantages of the invention will become apparent from the following description, including the drawings and the claims.


REFERENCES:
patent: 4333226 (1982-06-01), Abe et al.
patent: 5272359 (1993-12-01), Nagasubramanian et al.
patent: 5311039 (1994-05-01), Kimura et al.
patent: 5350484 (1994-09-01), Gardner et al.
patent: 5834824 (1998-11-01), Shepherd et al.
patent: 6600185 (2003-07-01), Tani et al.
patent: 100013013 (2000-10-01), None
patent: 02215173 (1990-08-01), None
patent: WO02/078102 (2002-10-01), None
Wolf, Silicon Processing for the VLSI Era, vol. 1, p. 535.*
Wolf, S., Tauber R.N.; Silicon Processing for the VLSI Era vol. 1: Process Technology, Lattice Press, Sunset Beach, CA, 1986, p. 535.

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