Pass gate multiplexer receiver circuit

Electrical transmission or interconnection systems – Nonlinear reactor systems – Parametrons

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307443, 307448, 307446, 307570, 307585, 3074821, 3073032, 357 2313, 357 43, H03K 1716, H03K 17687, H03K 1708, H03K 3073

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050362151

ABSTRACT:
A pass gate multiplexer receiver integrated circuit on a semiconductor substrate including a pass gate circuit including first and second field effect transistors of opposite polarity for providing an input signal to an output line, the first transistor including a first bipolar transistor for providing clamping an electrostatic discharge protection and the second transistor including a second bipolar transistor for providing clamping and electrostatic discharge protection. A control circuit is connected to the pass gate to control operation. In a second embodiment the pass gate further includes a clamping circuit to provide further clamping and electrostatic discharge protection.

REFERENCES:
patent: 4286173 (1981-08-01), Oka et al.
patent: 4710649 (1987-12-01), Lewis
patent: 4755696 (1988-07-01), Pickett
patent: 4812678 (1989-03-01), Abe
patent: 4857773 (1989-08-01), Takata et al.
patent: 4893031 (1990-01-01), Masuda
IBM Technical Disclosure Bulletin, vol. 19, No. 5, Oct. 1976, pp. 1829-1830, entitled "FET Signal Receiver for VTL Circuits".
IBM Technical Disclosure Bulletin, vol. 29, No. 12, May 1987, p. 5167, entitled "Fast Level Convertor Circuit".
IBM Technical Disclosure Bulletin, vol. 28, No. 8, Jan. 1986, pp. 3448-3449, entitled "General Purpose Interface Receiver Using Short Channel CMOS Devices".
IBM Technical Disclosure Bulletin, vol. 28, No. 9, Feb. 1986, pp. 4035-4037, entitled "Medium-Power, Minimal-Area Clamping Circuits for Bipolar Application".
IBM Technical Disclosure Bulletin, vol. 31, No. 2, Jul. 1988, pp. 474-475, entitled "High-Speed ECL BIFET Receiver for High-End System".
IBM Technical Disclosure Bulletin, vol. 16, No. 5, Oct. 1973, p. 1637, entitled "Low-Power Gated Receiver".
IBM Technical Disclosure Bulletin, vol. 31, No. 2, Jul. 1988, pp. 392-393, entitled "High Performance Off-Chip Common I/O Circuit".
IBM Technical Disclosure Bulletin, vol. 23, No. 3, Aug. 1980, p. 1052, entitled "Electrostatic Discharge Protection Device for Current Switch Receivers".
IBM Technical Disclosure Bulletin, vol. 26, No. 7A, Dec. 1983, pp. 3122-3123, entitled "ESD-Protected TTL Receiver for FET Products".
IBM Technical Technical Disclosure Bulletin, vol. 23, No. 4, Sep. 1980, pp. 1442-1443, entitled "Multiple I/O Protection With Single Protective Device".
IBM Technical Disclosure Bulletin, vol. 20, No. 12, May 1978, pp. 5192-5193, entitled "Low-Power Dissipation Push-Pull Driver".
IBM Technical Disclosure Bulletin, vol. 25, No. 3A, Aug. 1982, pp. 993-994, entitled "Low Voltage Inverter Receiver Circuit".

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