Partitioning of MOS random access memory array

Details Partitioning of MOS random access memory array Partitioning of MOS random access memory array

1976-05-03

1977-09-20

Hecker, Stuart N.

Communications: electrical

Digital comparator systems

340173DR, 340173FF, 340173CA, G11C 706, G11C 800

Patent

active

040500616

ABSTRACT:
A random access memory device of the MOS integrated circuit type using an array of one-transistor storage cells employs bistable sense amplifier circuits, one located in the center of each column line. The bistable circuits have current-limiting control devices in series therewith and the control devices are selected by the address circuits in a manner such that during an initial sensing period the current is low, then during a later period more current may be permitted for a higher level output. In parts of the array which are not being accessed by the current address, the increased current level is not permitted, thus reducing power dissipation.

REFERENCES:
patent: 3678473 (1972-07-01), Wahlstrom
patent: 3771147 (1973-11-01), Boll et al.
patent: 3806898 (1974-04-01), Askin

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