Partitioned shifter for single instruction stream multiple...

Details Partitioned shifter for single instruction stream multiple... Partitioned shifter for single instruction stream multiple...

2006-08-29

2006-08-29

Malzahn, D. H. (Department: 2193)

Electrical computers: arithmetic processing and calculating

Electrical digital calculating computer

Particular function performed

Reexamination Certificate

active

07099910

ABSTRACT:
A method of enabling a single instruction stream multiple data stream operation and a double precision floating point operation within a single floating point execution unit which includes providing a floating point unit with a two way aligner and a two way normalizer, selectively aligning a value based upon whether a single instruction stream multiple data stream operation is to be performed or a double precision operation is to be performed, and selectively normalizing a value based upon whether a single instruction stream multiple data stream operation is to be performed or a double precision operation is to be performed.

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patent: 6631392 (2003-10-01), Jiang et al.
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