Partitionable data fabric and computing arrangement

Details Partitionable data fabric and computing arrangement Partitionable data fabric and computing arrangement

2007-07-24

2007-07-24

Ho, Duc (Department: 2616)

Multiplex communications

Pathfinding or routing

Switching a message which includes an address header

C370S400000, C370S466000

Reexamination Certificate

active

10219028

ABSTRACT:
A circuit arrangement and method for interfacing a node and a data fabric. In a computing arrangement that includes a plurality of nodes intercoupled by the data fabric, each node is assigned to one of a plurality of partitions. A node-interface circuit is configured to interface with the source node, and a translation circuit translates data between a first format compatible with the nodes and a second format compatible with the data fabric. An access control circuit either enables or disables transmission of data from the source node based on whether the source and destination nodes are in the same partition.

REFERENCES:
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patent: 7082132 (2006-07-01), Beshai et al.
patent: 2003/0202510 (2003-10-01), Witkowski et al.
patent: 2004/0006725 (2004-01-01), Lakshmanamurthy et al.
I. Keslassy, N. McKeown, “Maintaining Packet Order in Two-stage Switches”, Computer Systems Laboratory, Stanford University.

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