Partially resettable, segmented DMA counter

Details Partially resettable, segmented DMA counter Partially resettable, segmented DMA counter

1993-07-23

1995-09-19

Bowler, Alyssa H.

Boots, shoes, and leggings

364240, 36424234, 3642601, 364DIG1, G06F 1300

Patent

active

054524326

ABSTRACT:
A direct memory access (DMA) controller (4) utilizes a segmented counter (220). A first, byte counter portion (330) of the counter is initialized with a preselected value and decremented for each byte transfer. After the byte portion of the counter reaches the preselected value it decrements a second, block portion (332) of the counter which is initialized based upon the amount of data to be transferred. When both the byte counter and the block counter reach zero the data transfer is completed.

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