Electrical computers: arithmetic processing and calculating – Electrical digital calculating computer – Particular function performed
Reexamination Certificate
1999-04-01
2001-10-09
Malzahn, David H. (Department: 2121)
Electrical computers: arithmetic processing and calculating
Electrical digital calculating computer
Particular function performed
C708S306000
Reexamination Certificate
active
06301596
ABSTRACT:
FIELD OF THE INVENTION
The invention relates generally to video graphics processing and more particularly to a partial sum FIR filter used in scaling operations.
BACKGROUND OF THE INVENTION
Video graphics images provided to a display often require scaling prior to output. This is because the images may have been generated with an aspect ratio that differs from that of the display. For example, a window within a display may be used to display an image that was originally generated for a much wider or much taller window. As such, the images must be scaled accordingly to fit the desired display window.
When downscaling an image, a number of individual pixels are often combined to create an output pixel. The input pixels are typically weighted according to their proximity to the relative location of the output pixel. For example, in a decimation filter that converts three pixels to a single output pixel, the weighting of the central or middle pixel of the three may be greater than the weighting of the peripheral pixels. Therefore, filtering operations typically involve a number of coefficients that determine the weighting of input values that correspond to the input pixels.
In order to perform the filtering functions required for scaling, partial sum finite input response (FIR) filters are often employed. The advantage of these filters is that a single multiplier and adder can be used to combine a number of different coefficients and input values by storing a partial sum in a buffer that is added to the next product produced by multiplying the following coefficient and pixel values. Some of the advantages of these filters can be lost when integer values are used as input values and coefficients. This is because the storage requirements for a product resulting from the multiplication of an M-bit coefficient by an N-bit input value is M+N bits. When it is taken into account that the number of pixels in a single display line may exceed 1,000 pixels, the memory or register requirements to buffer the partial sums required to perform the filtering operations can be substantial.
One solution to the problem presented by the large memory requirements is to only store a portion of the bits making up the partial sum. However, this requires truncation of the partial sum. The truncation of the partial sum can result in artifacts in the display that are undesirable. This is especially true along portions of the display where a ramp-type function exists. When truncation occurs along a ramp, a number of steps can be created due to the truncation. These steps or discrete jumps between values resulting from truncation can be visible on the display, and are undesirable.
Therefore, a need exists for a partial sum FIR filter that has a reduced memory requirement for storing partial sums, but does not produce the visual aberrations associated with truncation.
REFERENCES:
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patent: 6173003 (2001-01-01), Whikehart et al.
“Digital Image Processing,” Pratt; pp. 618-621.
“Handbook of Digital Signal Processing Engineering Applications,” Harris; pp. 251-252.
ATI International SRL
Malzahn David H.
Vedder Price Kaufman & Kammholz
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