Partial speed and full speed programming for non-volatile...

Details Partial speed and full speed programming for non-volatile... Partial speed and full speed programming for non-volatile...

2009-08-25

2011-12-20

Phung, Anh (Department: 2824)

Static information storage and retrieval

Floating gate

Particular connection

C365S185190, C365S185290, C365S185230, C711S156000

Reexamination Certificate

active

08081514

ABSTRACT:
Partial speed and full speed programming are achieved for a non-volatile memory system. During a program operation, in a first time period, bit lines of storage elements to be inhibited are pre-charged, while bit line of storage elements to be programmed at a partial speed and bit lines of storage elements to be programmed at a full speed are fixed. In a second time period, the bit lines of storage elements to be programmed at the partial speed are driven higher, while the bit lines of storage elements to be inhibited are floated and the bit line of storage elements to be programmed remain fixed. In a third time period, the bit lines of storage elements to be inhibited are driven higher while the bit lines of the storage elements to be programmed at the partial speed or the full speed are floated so that they couple higher.

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