Partial semiconductor wafer processing

Details Partial semiconductor wafer processing Partial semiconductor wafer processing

1998-11-09

2001-04-10

Grant, William (Department: 2121)

Data processing: generic control systems or specific application

Specific application, apparatus or process

Product assembly or manufacturing

C438S462000

Reexamination Certificate

active

06216055

ABSTRACT:

TECHNICAL FIELD OF THE INVENTION
This invention relates to semiconductor wafer processing and more particularly to partial wafer processing in die bonders for wafermap operations.
RELATED CO-PENDING APPLICATION
This invention is relates to Application Ser. No. 08/667,246 filed Jun. 20, 1996 entitled, “Method and Apparatus for Aligning the Position of Die on a Wafer Table,” of Balamurugan. The application is incorporated herein by reference.
BACKGROUND OF THE INVENTION
Semiconductor manufacturing includes the process of die attached performed by a die bonder or die attach machine. The basic operation of die bonder is to mount dies on lead frames. The die bonder deposits epoxy on the lead frame pad, picks up a die, and places it on the lead frame die pad. The epoxy is a historic term and is actually an adhesive which uses no catalyst.
The die is picked up by suction. The good dies are individually picked up and placed on a lead frame. To do this the location of the die must be precisely known so the machine can pick up the die.
The silicon wafer provides several patterns, to form a plurality of semi-conductor circuits. The individual integrated circuits on the wafer are separated by horizontal and vertical thoroughfares. The thoroughfares are border spaces between the semiconductor devices on the wafers. Along these thoroughfares are formed the saw streets when a cutter passes through them separating the individual circuits into what is termed “dies”. This process is referred to as sawing. Before cutting the separate circuits, the back of the wafer is placed on a double backed tape which in turn is stretched like a drum over a ring base called flexframe on a controllable wafer table. The location of the dies on the original wafer is recorded on the wafer map stored in a memory. After sawing the wafer, the dies are moved. Hence moving the wafer table per the wafer map coordinates does not accurately position the wafer table for the next die to be picked. Small die wafer map operation on die bonder equipment is not feasible because of this. The variation in the saw street width across the wafer coupled with the tape shrinkage on partially picked wafers makes the one time correction of table jump distance for street width variation ineffective in ensuring the accurate table position.
A full wafer has one reference die. Sometimes it is desirable to only use part of a wafer for a particular job and store away the remaining for later use. The partial use will usually result in removal of the reference die. Therefore a reference die may not be available.
SUMMARY OF THE INVENTION
In accordance with one embodiment of the present invention coordinates for a locator die and/or an auxiliary reference die are stored on a wafer map of a given wafer for locating dies on a partial section of the given wafer.
These and other features of the invention that will be apparent to those skilled in the art from the following detailed description of the invention, taken together with the accompanying drawings.


REFERENCES:
patent: 4778745 (1987-03-01), Leung
patent: 5428442 (1993-09-01), Lin et al.
patent: 5838951 (1996-08-01), Song
patent: 5851848 (1996-06-01), Balamurugan
patent: 5943551 (1997-09-01), Schemmel et al.
patent: 6016358 (1998-02-01), Balamurugan
patent: 6028664 (1997-04-01), Cheng et al.

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