Partial scan path test of a semiconductor logic circuit

Details Partial scan path test of a semiconductor logic circuit Partial scan path test of a semiconductor logic circuit

1994-12-27

1998-03-10

Beausoliel, Jr., Robert W.

Excavating

371 2231, 371 225, G01R 3128

Patent

active

057269980

ABSTRACT:
A semiconductor logic circuit designing apparatus includes a storage section for storing a connection information of a semiconductor logic circuit to be designed, a connection determining section for determining based on the connection information whether each of control terminals of each of sequential circuits of the semiconductor logic circuit except for flip-flop circuits constituting a shift register for a partial scan path is connected to one or more of the flip-flop circuits, and a changing section for selectively changing the connection information in accordance with circuit elements connected to the output of each of the one or more flip-flop circuits to add a latch immediately after an output terminal of each of the one or more flip-flop circuits on a path between the output terminal of each of the one or more flip-flop circuits and each sequential circuit when it is determined that each control terminal of each sequential circuit is connected to the one or more flip-flop circuits.

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patent: 5282146 (1994-01-01), Aihara et al.
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patent: 5513118 (1996-04-01), Dey et al.
patent: 5519714 (1996-05-01), Nakamura et al.
K. Gutfreund, "Integrating the Approaches to Structured Design for Testability", VLSI Design, Oct. 1983, pp. 34-37 and 40-42.

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