Partial defective chip memory support system

Details Partial defective chip memory support system Partial defective chip memory support system

1982-12-17

1985-06-11

Smith, Jerry

Excavating

365200, 364200, G06F 1120, G11C 1300

Patent

active

045233136

ABSTRACT:
A memory controller includes a partial defective bulk random access memory having a number of word locations constructed from a plurality of bit wide chips containing a predefined small number of random row or column faults. System columns of chips are organized into a plurality of groups, each group providing a different predetermined portion of the number of word locations. A defect-free memory system having substantially less capacity is similarly organized. Both memories couple to a static memory which stores column addresses associated with good memory locations and slice bit codes specifying the operational status of corresponding bit groups of word locations within both memories. During operation, read/write control circuits read and write valid words from group of bit locations from locations of both memories specified by slice bit codes.

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Smith, G. H. et al., "Substitute Memory Location Locator", IBM Tech. Disclosure Bulletin, vol. 12, No. 9, Feb. 1970.
Smith, G. H. et al., "Substitute Memory Location Assignment for Faulty Locations", IBM Tech. Disclosure Bulletin, vol. 12, No. 9, Feb. 1970.
Beau Soleil, W. F., "Utilization of Defective Memory Chips by Substituting Redundant Words for Defective Words", IBM Tech. Disclosure Bulletin, vol. 15, No. 6, Nov. 1972.
Lloyd, R., "The Case for Using Partially-Good Memory Devices", Computer Design, Apr. 1977.
Donaldson, J., "Partial RAMS Can Fill Today's Memory Boards", Electronics, Jan. 17, 1980.

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