Partial carry-save pipeline multiplier

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364758, G06F 752

Patent

active

054576466

ABSTRACT:
A pipeline multiplier is used for multiplying a multiplicand to a multiplier. The pipeline multiplier includes a plurality of adder stages each adder stage includes a partial product processor for processing a partial product of the multiplicand and one of the multiplier. Each of the adder stages further includes a plurality of ripple carry adder (RCA) bands each band includes a plurality of full adders wherein the carry of the full adders ripple sequentially to the most significant full adder in the RCA band. Furthermore, each of the RCA bands in each adder stage includes approximately same number of full adders. The adder stages are further arranged in sequential order such that each of the RCA bands in each stage are pipelined to a corresponding RCA band, which is a RCA band being more-significantly-shifted by one bit, in next adder stage according to the sequential order whereby an accumulative partial product is propagated from one of the adder stages to a next stage. The full adders in each of the RCA band add the partial product from the partial product processing means to the accumulative partial product propagated from last adder stage according to the sequential order. Each of the adder stages further includes a half adder for adding the carry from the RCA band to a bit of the partial product which is the least significant bit of a next more significant RCA band in the adder stage for propagating a processed band-carry to the corresponding RCA band in the next adder stage as the most significant bit of the partial product and to a more significant RCA band in the next adder stage as a carry-in.

REFERENCES:
patent: 4644488 (1987-02-01), Nathan
patent: 4982355 (1991-01-01), Nishimura et al.
patent: 5101372 (1992-03-01), Heaslip
patent: 5151875 (1992-09-01), Sato

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