Parity inversion test system

Details Parity inversion test system Parity inversion test system

1992-10-02

1995-03-28

Canney, Vincent P.

Excavating

371 204, 371 23, G01R 3100

Patent

active

054024307

ABSTRACT:
A parity inversion test system includes an interface part having an input side coupled to a N-bit data line and an output side coupled to a M-bit data line, where N<M, an output coupling part for coupling at least a part of a data output from the output side of the interface part to the data output from the output side of the interface part in a test mode so as to output a M-bit data, a parity generating part for generating a parity data with respect to the M-bit data output to the M-bit data line via the output coupling part based on the M-bit data, and a parity inversion bit specifying part for specifying arbitrary bits of the M-bit data output to the M-bit data line which are to be inverted when generating the parity data in the parity generating part.

REFERENCES:
patent: 4914655 (1990-04-01), Johannes et al.

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