Parity error detection and recovery

Details Parity error detection and recovery Parity error detection and recovery

1992-01-02

1994-05-17

Beausoliel, Jr., Robert W.

Excavating

371 491, G06F 1100

Patent

active

053136276

ABSTRACT:
In a computer system having a CPU and several buses which includes a system bus and an I/O bus, parity error can occur when data is being written between the I/O bus and the system bus. This invention provides a technique for detecting whether a parity error has occurred on data being written between the system bus and the I/O bus. If a parity error is detected, the address at which such error occurred is stored and then sent on to the system bus to the CPU.

REFERENCES:
patent: 3806716 (1974-04-01), Lahti et al.
patent: 4858234 (1989-08-01), Hartwell et al.
patent: 5072450 (1991-12-01), Helm et al.
patent: 5173905 (1992-12-01), Parkinson et al.
patent: 5235694 (1993-08-01), Umeda
patent: 5247671 (1993-09-01), Adkins et al.

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