Parity check logic circuit

Details Parity check logic circuit Parity check logic circuit

1987-03-05

1988-10-04

Heyman, John S.

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

307443, 307445, 307448, 371 49, G06F 750, H03K 17/16, H03K 1920

Patent

active

047758104

ABSTRACT:
A multiple-input logic circuit for carrying out an even parity check operation or an odd parity check operation on a plurality of input signals has such a circuit construction that a signal only passes through a maximum of essentially two gates between an input and an output of the multiple-input logic circuit, so as to increase the operation speed and reduce the number of elements constituting the multiple-input logic circuit.

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