Parasitic PNP transistor with crystal defect layer in the emitte

Details Parasitic PNP transistor with crystal defect layer in the emitte Parasitic PNP transistor with crystal defect layer in the emitte

1994-01-24

1997-02-18

Saadat, Mahshid

Active solid-state devices (e.g., transistors, solid-state diode

Non-single crystal, or recrystallized, semiconductor...

Field effect device in non-single crystal, or...

257 66, 257 67, 257 68, 257296, 437 24, 437 35, 437 44, H01L 2976, H01L 27108

Patent

active

056043597

ABSTRACT:
A transistor comprising a P-type high concentration impurity diffusion layer which can also serve as an emitter for a parasitic PNP transistor wherein a layer of crystal defect obtained by ion implantation of inert impurity atoms or a compound thereof is arranged in the P-type high concentration impurity diffusion layer thereby decreasing the current amplification rate of the parasitic transistor.

REFERENCES:
patent: 5223445 (1993-06-01), Fuse
patent: 5237187 (1993-08-01), Suwanai et al.
patent: 5244820 (1993-09-01), Kamata et al.
patent: 5466960 (1995-11-01), Ilderem et al.
Wolf et al, Silicon Processing for the VLSI Era, vol. 1: Process Technology (Lattice Press, Sunset Beach, CA, 1986) p. 325.

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