Parasitic insensitive auto-zeroed operational amplifier

Details Parasitic insensitive auto-zeroed operational amplifier Parasitic insensitive auto-zeroed operational amplifier

1985-01-28

1986-01-21

Mullins, James B.

Amplifiers

With periodic switching input-output

330 51, H03F 102, H03F 114

Patent

active

045659710

ABSTRACT:
An operational amplifier circuit which is substantially insensitive to inherent parasitic capacitance associated therewith is provided. An error voltage resulting from the parasitic capacitance is typically coupled onto a capacitor which is connected to a first input of an operational amplifier. To compensate for the error voltage, a substantially identical second error voltage is created and coupled to a second input of the operational amplifier, thereby cancelling the effects of the first error voltage.

REFERENCES:
patent: 4306196 (1981-12-01), Dwarakanath et al.
patent: 4404525 (1984-09-01), Amir et al.
patent: 4429282 (1984-01-01), Saari
patent: 4430622 (1984-02-01), Simoes
patent: 4439693 (1984-03-01), Lucas et al.
Sheu, Bing J., and Hu, Chemming, "Switch-Induced Error Voltage on a Switched Capacitor", IEEE J. SS. Ekts., vol. SC-19, No. 4, Aug. 1984, pp. 519-525.

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