Parametric device signature

Data processing: measuring – calibrating – or testing – Testing system – Of circuit

Reexamination Certificate

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Details

C702S118000, C700S121000

Reexamination Certificate

active

06601008

ABSTRACT:

FIELD
This invention relates to the field of integrated circuit manufacturing. More particularly, this invention relates to die location tracking and integrated circuit binning.
BACKGROUND
Tracking the dice on which integrated circuits are manufactured, such as semiconductor devices, is typically viewed as an important function. Tracking the dice may be divided into two distinct, but related concepts. This first concept is tracking the location of a die on the substrate through the subsequent dicing, testing, and sorting operations. As is appreciated, without some mechanism for tracking the substrate location of a given die, this information tends to be forever lost once the die is diced and removed from the dicing tape.
Tracking the substrate location of a die may, in many different cases, be important for improving final test yields. For example, by tracking the dice that exhibit a specific failure at final test, it may be determined that all of the dice originate from a specific portion of each processed substrate. Information such as this helps engineers to discover and correct processing problems.
Traditionally, dice have been tracked according to this first concept by methods such as laser inscribing information such as the lot number, substrate number, and location of the die on the substrate onto an open portion of the die. Unfortunately, this method requires that at least a minimal amount of substrate surface area be left unused by the integrated circuit, so that there is room to laser scribe each die. Thus, this method tends to be in direct competition with the design goal of generally reducing the size of the dice on which integrated circuits are fabricated. This method also requires that a lengthy and expensive laser scribing process be added to the substrate processing.
The second concept is readily identifying dice that have not fully passed the inspections at various points in the processing, such as wafer sort or final test. Identification of these maverick integrated circuits is important so that they are not packaged and shipped to customers and fully operational devices. Traditionally, dice have been tracked according to this second concept by methods such as placing an ink drop on the maverick die. Unfortunately, this method tends to eliminate the possibility of binning the integrated circuits into various quality levels. Rather, the die either has an ink blot and is scrapped, or doesn't have an ink blot and is passed. Thus, there is no ability with this method to bin the integrated, circuits into several different grades.
Thus, the traditional methods as described above tend to require additional steps or additional surface area on the die, and also tend to be somewhat limiting. What is needed, therefore, is a method for tracking dice in a manner where both substrate location and test results for the dice are not lost, and where additional steps and additional surface area on the dice are not required.
SUMMARY
The above and other needs are met by a method of tracking information associated with an integrated circuit on a substrate to the integrated circuit after it has been diced. As a part of the process, a data set of parameters is collected from the integrated circuit during a first testing process. A first signature is determined for the integrated circuit, based at least in part on the data set of parameters collected from the integrated circuit during the first testing process. The data set of parameters and other information are associated with the integrated circuit.
The integrated circuit on the substrate is diced to separate the integrated circuit from the substrate. The data set of parameters is collected anew from the integrated circuit during a second testing process. A second signature is determined for the integrated circuit, based at least in part on the data set of parameters collected anew from the integrated circuit during the second testing process.
The second signature is compared to multiple first signatures to locate the first signature that substantially matches the second signature. The other information associated with the first signature is associated with the diced integrated circuit.
Thus, the method as described above provides a way for a diced integrated circuit to be associated with information in regard to the integrated circuit that was collected or known prior to dicing the integrated circuit, without the need for methods such as laser scribing. The present method works without the need to add special circuitry to the integrated circuit. In other words, the method is preferably performed on production circuitry rather than test circuitry. Production circuitry is understood to refer to that circuitry for which the integrated circuit is fabricated, which circuitry is available for productive use in an application of the integrated circuit by the end user. Test circuitry, on the other hand, is typically not used in an application by an end user, but is instead used during production of the integrated circuit to ensure that various processes and structures are performed and fabricated properly. Thus, test circuitry is often considered to be a necessary evil because it is not generally useful to the end user, and it takes up valuable surface area on the chip which could otherwise either be used by production circuitry or eliminated altogether to reduce the size of the chip.
The method works by creating a unique signature for the integrated circuit, based on test results. The test results from which the unique signature is created are stored with the information that is to be tracked, such as die location on the substrate. At a later point in time, such as after the integrated circuit is diced, and the other information is no longer able to be determined from the integrated circuit alone, the same tests can be run on the diced integrated circuit, and the unique signature can be recreated from the test results. The recreated signature can be compared to signatures derived from the original test results, until two of the signatures agree with a high degree of certainty. When this is done, the other information associated with the first test results may be reliably associated with the diced integrated circuit.
Thus, a preferred method according to present invention uses tests that are already performed to identify the integrated circuit. Thus, there is no extra testing or data collection. The method also provides the opportunity to identify maverick die signatures and bin the dice on this basis. Substrate based identification methods do not provide these same benefits.
In various preferred embodiments of the invention, at least one of the first signature and the second signature are compared to at least one binning value. The integrated circuit is binned based at least in part on whether at least one of the first signature and the second signature associated with the integrated circuit violates the at least one binning value. Preferably, the other information associated with the integrated circuit includes at least one of the first signature, a substrate designation for the substrate on which the integrated circuit is located, and a location designation for the integrated circuit on the substrate. The first testing process is preferably wafer sort, and the second testing process is preferably final test.
The data set of parameters and the other information associated with the integrated circuit are preferably stored on a storage medium after collecting the data set of parameters. The storage medium may be, for example, one or more of magnetic media, optical media, and electronic media.
In one embodiment, the data set of parameters collected during the first testing process is a part of a first meta data set of parameters, and the data set of parameters collected during the second testing process is a part of a second meta data set of parameters. In other words, more data may be collected during the first and second testing processes than is used to determine the signature for the integrated circuit. The first meta data set o

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