Computer-aided design and analysis of circuits and semiconductor – Design of semiconductor mask or reticle – Manufacturing optimizations
Reexamination Certificate
2011-04-26
2011-04-26
Lin, Sun J (Department: 2825)
Computer-aided design and analysis of circuits and semiconductor
Design of semiconductor mask or reticle
Manufacturing optimizations
C716S050000, C716S052000
Reexamination Certificate
active
07934175
ABSTRACT:
A parameter adjustment method for a plurality of manufacturing devices to form a pattern of a semiconductor device on a substrate using the manufacturing devices includes: adjusting a parameter adjustable for a manufacturing device serving as a reference manufacturing device; obtaining a first shape of a pattern of a semiconductor device to be formed on a substrate; defining an adjustable parameter of another to-be-adjusted manufacturing; obtaining a second shape of the pattern formed on the substrate; calculating a difference amount between a reference finished shape and a to-be-adjusted finished shape; repeatedly calculating the difference amount by changing the to-be-adjusted parameter until the difference amount becomes equal to or less than a predetermined reference value; and outputting as a parameter of the to-be-adjusted manufacturing device the to-be-adjusted parameter.
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Notification of Reasons for Rejection mailed by the Japanese Patent Office on Jul. 31, 2009, for Japanese Patent Application No. 2007-099187, and English-language translation thereof.
Hashimoto Koji
Inoue Soichi
Kai Yasunobu
Kotani Toshiya
Masukawa Kazuyuki
Finnegan Henderson Farabow Garrett & Dunner L.L.P.
Kabushiki Kaisha Toshiba
Lin Sun J
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