Miscellaneous active electrical nonlinear devices – circuits – and – Signal converting – shaping – or generating – Having specific delay in producing output waveform
Patent
1996-09-27
1999-04-06
Callahan, Timothy P.
Miscellaneous active electrical nonlinear devices, circuits, and
Signal converting, shaping, or generating
Having specific delay in producing output waveform
327281, 327158, H03K 513
Patent
active
058923837
ABSTRACT:
Two voltage controlled resistance elements are coupled together in parallel. The first voltage controlled resistance element is coupled to a first voltage input, a voltage source, and an output. The second voltage controlled resistance element is coupled to a second voltage input, the voltage source, the first voltage controlled resistance element, and the output. The parallel resistance elements provide a variable resistance based on the resistance values of the first and second voltage controlled resistance elements.
REFERENCES:
patent: 4820943 (1989-04-01), Makino et al.
patent: 4905192 (1990-02-01), Nogami et al.
patent: 5012141 (1991-04-01), Tomisawa
patent: 5111085 (1992-05-01), Stewart
patent: 5121014 (1992-06-01), Huang
patent: 5179303 (1993-01-01), Searles et al.
patent: 5343099 (1994-08-01), Schichinohe
patent: 5428311 (1995-06-01), McClure
patent: 5440260 (1995-08-01), Hayashi et al.
patent: 5446417 (1995-08-01), Korhonen et al.
patent: 5506534 (1996-04-01), Guo et al.
Kim, B., Helman, D.N., Gray, P.R.; "A 30MHz Hybrid Analog/Digital Clock Recovery Circuit in 2-um CMOS"; IEEE Journal of Solid-State Circuits; vol. 25; No. 6; Dec. 1990; pp. 1385-1394.
Maneatis, John G., Horowitz, M.A.; "TA 7.5: Precise Delay Generation Using Coupled Oscillators"; 1993 IEEE International Solid-State Circuits Conference; Feb. 25, 1993; pp. 118-119.
Moon, G., Zaghloul, M.E., Newcomb, R.W.; "an Enhancement-Mode MOS Voltage-Controlled Linear Resistor with Large Dynamic Range"; IEEE Transactions on Circuits and Systems; vol. 37; No. 10; Oct. 1990; pp. 1284-1288.
Shariatdoust, R., Nagaraj, K., Saniski, M., Plany, J.; "A Low Jitter 5 MHz to 180 MHz Clock Synthesizer for Video Graphics"; 1992 IEEE Custom Integrated Circuits Conference; pp. 24.2.1-24.2.5.
Young, I.A., Greason, J. K., Wong, K.L.; "A PLL Clock Generator with 5 to 110 MHz of Lock Range for Microprocessors"; IEEE Journal of Solid-State Circuits; vol. 27; No. 11; Nov. 1992; pp. 1599-1606.
Callahan Timothy P.
Intel Corporation
Shin Eunja
LandOfFree
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