Parallel VLSI shift switch logic devices

Details Parallel VLSI shift switch logic devices Parallel VLSI shift switch logic devices

1998-02-11

2000-09-26

Mai, Tan V.

Electrical computers: arithmetic processing and calculating

Electrical digital calculating computer

Particular function performed

708625, G06F 752

Patent

active

061253790

ABSTRACT:
A new logic with shift switches incorporating novel parallel compressors and counters called C4 and (7,3) families. This shift switch logic deals with modulo arithmetic operations. It employs a type of special digital signals, called state signals (as a major addition to the binary signals), and a set of electronic components, called shift switches, to manipulate such signals and conduct the logic operations. A useful modulo arithmetic produces two values: a remainder and a quotient, given two small (non-negative) integers. One integer is a variable numerator represented by a set of input digital signals (including regular and/or state signals), while the other is a dominator (base or radix) provided by the shift switch circuit as a parameter. Using C4 and (7,3) devices, two novel, parallel-structured, full array, 64.times.64 floating point multiplier schemes are disclosed.

REFERENCES:
patent: 5148388 (1992-09-01), Parmar et al.
patent: 5187679 (1993-02-01), Vassiliadis et al.
patent: 5303176 (1994-04-01), Hrusecky et al.
patent: 5426598 (1995-06-01), Hagihara

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